Inventor · disambiguated record
Kyrylo Perelygin
Also filed as: PERELYGIN KYRYLO
5 granted patents·25 pending applications·26 citations·filing 2014–2025
75Inventor score
Files withNVIDIA CORP30
Top patents by PatentIndex Score
30 records- 0191US11080111B1Technique for sharing context among multiple threadsNVIDIA CORP·Filed 2020·Granted Aug 3, 2021·19 cites·29 claims
- 0285US12243118B2Techniques for using contextual informationNVIDIA CORP·Filed 2022·Granted Mar 4, 2025·2 cites·29 claims
- 0383US9886736B2Selectively killing trapped multi-process service clients sharing the same hardware contextNVIDIA CORP·Filed 2014·Granted Feb 6, 2018·5 cites·22 claims
- 0468US2025335196A1Application programming interface to wait on matrix multiply-accumulateNVIDIA CORP·Filed 2024·Application pending·0 cites
- 0565US12204897B2Application programming interface to wait on matrix multiply-accumulateNVIDIA CORP·Filed 2022·Granted Jan 21, 2025·0 cites·20 claims
- 0665US2025190285A1Application programming interface for scan operationsNVIDIA CORP·Filed 2025·Application pending·0 cites
- 0765US2025181356A1Application programming interface to configure processor partitioningNVIDIA CORP·Filed 2025·Application pending·0 cites
- 0863US2024289186A1Application programming interface to share data with threadsNVIDIA CORP·Filed 2024·Application pending·0 cites
- 0963US2024289129A1Application programming interface to modify threadNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1059US12468537B2Location agnostic data accessNVIDIA CORP·Filed 2022·Granted Nov 11, 2025·0 cites·27 claims
- 1158US2023131961A1Application programming interface to configure processor partitioningNVIDIA CORP·Filed 2021·Application pending·0 cites
- 1257US2023111125A1Application programming interface for scan operationsNVIDIA CORP·Filed 2021·Application pending·0 cites
- 1352US2025355674A1Memory initializationNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1452US2025355647A1Compiler to cause information initializationNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1550US2025355757A1Identifying thread errorsNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1648US2025245060A1Application programming interface to indicate multiprocessor availabilityNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1748US2025245153A1Application Programming Interface to Deallocate a Data StructureNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1848US2025245072A1Application programming interface to communicate contextNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1948US2025245775A1Application programming interface to store identifiers of multiprocessor groupsNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2048US2025245046A1Application programming interface to allocate a data structureNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2148US2025245073A1Application programming interface to wait for contextNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2248US2025245013A1Application programming interface to store an identifier of a data structureNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2348US2025245043A1Application programming interface to indicate multiprocessor groupsNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2448US2025245066A1Application programming interface to read from a data structureNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2546US2022365750A1Datatype conversion techniqueNVIDIA CORP·Filed 2022·Application pending·0 cites
- 2645US2025181428A1Application programming interface to identify function versionsNVIDIA CORP·Filed 2025·Application pending·0 cites
- 2743US2023305853A1Application programming interface to perform operation with reusable threadNVIDIA CORP·Filed 2022·Application pending·0 cites
- 2842US2023118662A1Configurable processor partitioningNVIDIA CORP·Filed 2021·Application pending·0 cites
- 2941US2023086989A1Parallel processing of thread groupsNVIDIA CORP·Filed 2021·Application pending·0 cites
- 3040US2022413945A1Synchronization barrierNVIDIA CORP·Filed 2021·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Kyrylo Perelygin files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →