Inventor · disambiguated record
L. Randall Mote, Jr.
Also filed as: MOTE JR L RANDALL · MOTE L RANDALL
16 granted patents·979 citations·filing 1993–2004
95Inventor score
Top patents by PatentIndex Score
16 records- 0191US5805609AMethod and apparatus for testing a megacell in an ASIC using JTAGSAMSUNG ELECTRONICS CO LTD·Filed 1997·Granted Sep 8, 1998·98 cites·5 claims
- 0291US5638534AMemory controller which executes read and write commands out of orderSAMSUNG ELECTRONICS CO LTD·Filed 1995·Granted Jun 10, 1997·199 cites·6 claims
- 0387US5852617AJtag testing of buses using plug-in cards with Jtag logic mounted thereonSAMSUNG ELECTRONICS CO LTD·Filed 1995·Granted Dec 22, 1998·144 cites·4 claims
- 0482US5666494AQueue management mechanism which allows entries to be processed in any orderSAMSUNG ELECTRONICS CO LTD·Filed 1995·Granted Sep 9, 1997·111 cites·2 claims
- 0579US5630110AMethod and apparatus for enhancing performance of a processorSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted May 13, 1997·90 cites·8 claims
- 0678US5826043ADocking station with serially accessed memory that is powered by a portable computer for identifying the docking stationAST RESEARCH INC·Filed 1997·Granted Oct 20, 1998·86 cites·6 claims
- 0778US5654929ARefresh strategy for DRAMsSAMSUNG ELECTRONICS CO LTD·Filed 1995·Granted Aug 5, 1997·43 cites·7 claims
- 0878US5537062AGlitch-free clock enable circuitAST RESEARCH INC·Filed 1995·Granted Jul 16, 1996·31 cites·3 claims
- 0977US5648973AI/O toggle test method using JTAGAST RESEARCH INC·Filed 1996·Granted Jul 15, 1997·42 cites·6 claims
- 1074US5731715AGlitch-free clock enable circuitSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Mar 24, 1998·26 cites·14 claims
- 1168US5631912AHigh impedance test mode for JTAGSAMSUNG ELECTRONICS CO LTD·Filed 1995·Granted May 20, 1997·31 cites·5 claims
- 1266US5324996AFloating fault tolerant input buffer circuitAST RESEARCH INC·Filed 1993·Granted Jun 28, 1994·20 cites·4 claims
- 1364US5764966AMethod and apparatus for reducing cumulative time delay in synchronizing transfer of buffered data between two mutually asynchronous busesSAMSUNG ELECTRONICS CO LTD·Filed 1997·Granted Jun 9, 1998·48 cites·5 claims
- 1457US7165193B2Efficient memory allocation scheme for data collectionBROADCOM CORP·Filed 2004·Granted Jan 16, 2007·4 cites·21 claims
- 1554US6836861B2Efficient memory allocation scheme for data collectionBROADCOM CORP·Filed 2001·Granted Dec 28, 2004·3 cites·21 claims
- 1631US5815673AMethod and apparatus for reducing latency time on an interface by overlapping transmitted packetsSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Sep 29, 1998·3 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →