Inventor · disambiguated record
Laurence E. Bays
Also filed as: BAYS LAURENCE · BAYS LAURENCE E · BAYS LAURENCE EDWARD
9 granted patents·3 pending applications·229 citations·filing 1985–2024
90Inventor score
Files withAGERE SYST GUARDIAN CORP3AGERE SYSTEMS INC2LUCENT TECHNOLOGIES INC2AMERICAN TELEPHONE & TELEGRAPH1AT & T BELL LAB1
Top patents by PatentIndex Score
12 records- 0175US6965974B1Dynamic partitioning of memory banks among multiple agentsAGERE SYSTEMS INC·Filed 1998·Granted Nov 15, 2005·80 cites·20 claims
- 0273US6377086B1Low power dual-voltage sense circuit bufferAGERE SYST GUARDIAN CORP·Filed 1999·Granted Apr 23, 2002·29 cites·10 claims
- 0370US7231467B2Method and apparatus for providing an inter integrated circuit interface with an expanded address range and efficient priority-based data throughputAGERE SYSTEMS INC·Filed 2003·Granted Jun 12, 2007·16 cites·19 claims
- 0460US6275948B1Processor powerdown operation using intermittent bursts of instruction clockAGERE SYST GUARDIAN CORP·Filed 1998·Granted Aug 14, 2001·32 cites·30 claims
- 0556US2024333417A1Enhanced bit borrowing techniques for streaming data protocolsINTEL CORP·Filed 2024·Application pending·0 cites
- 0654US5287296AClock generators having programmable fractional frequency divisionAT & T BELL LAB·Filed 1992·Granted Feb 15, 1994·26 cites·9 claims
- 0752US5648777AData converter with FIFOLUCENT TECHNOLOGIES INC·Filed 1993·Granted Jul 15, 1997·15 cites·27 claims
- 0846US6282666B1Computer peripheral device having the capability to wake up from a cold state with information stored before cold powerdownAGERE SYST GUARDIAN CORP·Filed 1999·Granted Aug 28, 2001·18 cites·24 claims
- 0938US2003126413A1Processor system including internal address generator for implementing single and burst data transfersFiled 2000·Application pending·0 cites
- 1037US5754590AModem architecture for integrated controller and data pump applicationsLUCENT TECHNOLOGIES INC·Filed 1996·Granted May 19, 1998·6 cites·13 claims
- 1135US4788693AData communication replicatorAMERICAN TELEPHONE & TELEGRAPH·Filed 1985·Granted Nov 29, 1988·7 cites·12 claims
- 1234US2013019041A1Bit slice round robin arbiterLSI CORP·Filed 2011·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Laurence E. Bays files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →