Inventor · disambiguated record
Laurent Isenegger
Also filed as: ISENEGGER LAURENT
18 granted patents·4 pending applications·18 citations·filing 2018–2025
89Inventor score
Files withMICRON TECHNOLOGY INC22
Top patents by PatentIndex Score
22 records- 0196US11175859B1Managing memory commands in a memory subsystem by adjusting a maximum number of low priority commands in a DRAM controllerMICRON TECHNOLOGY INC·Filed 2020·Granted Nov 16, 2021·7 cites·20 claims
- 0294US11593024B1Request control for memory sub-systemsMICRON TECHNOLOGY INC·Filed 2021·Granted Feb 28, 2023·3 cites·24 claims
- 0391US11604749B2Direct memory access (DMA) commands for noncontiguous source and destination memory addressesMICRON TECHNOLOGY INC·Filed 2021·Granted Mar 14, 2023·2 cites·20 claims
- 0491US11599472B1Interleaved cache prefetchingMICRON TECHNOLOGY INC·Filed 2021·Granted Mar 7, 2023·2 cites·16 claims
- 0588US10990548B1Quality of service levels for a direct memory access engine in a memory sub-systemMICRON TECHNOLOGY INC·Filed 2019·Granted Apr 27, 2021·4 cites·20 claims
- 0679US2025123770A1Request control for memory sub-systemsMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 0775US12182442B2Request control for memory sub-systemsMICRON TECHNOLOGY INC·Filed 2023·Granted Dec 31, 2024·0 cites·20 claims
- 0874US2025014628A1Command scheduling component for memoryMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 0973US11886348B2Interleaved cache prefetchingMICRON TECHNOLOGY INC·Filed 2023·Granted Jan 30, 2024·0 cites·20 claims
- 1068US11847058B2Using a second content-addressable memory to manage memory burst accesses in memory sub-systemsMICRON TECHNOLOGY INC·Filed 2022·Granted Dec 19, 2023·0 cites·18 claims
- 1168US2025190141A1Write Request BufferMICRON TECHNOLOGY INC·Filed 2025·Application pending·0 cites
- 1266US11461256B2Quality of service levels for a direct memory access engine in a memory sub-systemMICRON TECHNOLOGY INC·Filed 2021·Granted Oct 4, 2022·0 cites·20 claims
- 1362US12254213B2Write request buffer capable of responding to read requestsMICRON TECHNOLOGY INC·Filed 2021·Granted Mar 18, 2025·0 cites·31 claims
- 1462US12112786B2Command scheduling component for memoryMICRON TECHNOLOGY INC·Filed 2021·Granted Oct 8, 2024·0 cites·18 claims
- 1562US11086808B2Direct memory access (DMA) commands for noncontiguous source and destination memory addressesMICRON TECHNOLOGY INC·Filed 2019·Granted Aug 10, 2021·0 cites·20 claims
- 1657US11782851B2Dynamic queue depth adjustmentMICRON TECHNOLOGY INC·Filed 2021·Granted Oct 10, 2023·0 cites·20 claims
- 1757US11442867B2Using a second content-addressable memory to manage memory burst accesses in memory sub-systemsMICRON TECHNOLOGY INC·Filed 2018·Granted Sep 13, 2022·0 cites·20 claims
- 1856US11301383B2Managing processing of memory commands in a memory subsystem with a high latency backing storeMICRON TECHNOLOGY INC·Filed 2020·Granted Apr 12, 2022·0 cites·20 claims
- 1954US11836096B2Memory-flow control registerMICRON TECHNOLOGY INC·Filed 2021·Granted Dec 5, 2023·0 cites·36 claims
- 2054US11809710B2Outstanding transaction monitoring for memory sub-systemsMICRON TECHNOLOGY INC·Filed 2021·Granted Nov 7, 2023·0 cites·19 claims
- 2150US11854600B2Write request thresholdingMICRON TECHNOLOGY INC·Filed 2021·Granted Dec 26, 2023·0 cites·18 claims
- 2245US2023065395A1Command retrieval and issuance policyMICRON TECHNOLOGY INC·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →