Inventor · disambiguated record
Larry B. Weber
Also filed as: WEBER LARRY B
3 granted patents·250 citations·filing 1988–1995
78Inventor score
Technology areasG06F
Top patents by PatentIndex Score
3 records- 0190US4959779ADual byte order computer architecture a functional unit for handling data sets with differnt byte ordersMIPS COMPUTER SYSTEMS INC·Filed 1988·Granted Sep 25, 1990·132 cites·4 claims
- 0281US5398328ASystem for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory ordersSILICON GRAPHICS INC·Filed 1993·Granted Mar 14, 1995·82 cites·9 claims
- 0361US5572713ASystem and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory ordersSILICON GRAPHICS INC·Filed 1995·Granted Nov 5, 1996·36 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →