Inventor · disambiguated record
Liang-Pin Chou
Also filed as: CHOU LIANG-PIN
20 granted patents·12 pending applications·8 citations·filing 2003–2025
89Inventor score
Files withNANYA TECHNOLOGY CORP32
Top patents by PatentIndex Score
32 records- 0190US11488959B2Gate-all-around semiconductor device with dielectric-all-around capacitor and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2020·Granted Nov 1, 2022·2 cites·17 claims
- 0289US11785760B2Gate-all-around semiconductor device with dielectric-all-around capacitor and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2022·Granted Oct 10, 2023·1 cites·20 claims
- 0383US11088095B2Package structureNANYA TECHNOLOGY CORP·Filed 2019·Granted Aug 10, 2021·4 cites·15 claims
- 0481US12295138B2Semiconductor device with supporting layer and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2023·Granted May 6, 2025·0 cites·10 claims
- 0579US12176267B2Semiconductor device and method for manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2023·Granted Dec 24, 2024·0 cites·14 claims
- 0677US2025194077A1Semiconductor device with supporting layer and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2025·Application pending·0 cites
- 0777US2024363494A1Method for manufacturing semiconductor structure sameNANYA TECHNOLOGY CORP·Filed 2024·Application pending·0 cites
- 0876US12369310B2Semiconductor device with supporting layer and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2022·Granted Jul 22, 2025·0 cites·18 claims
- 0975US11978662B2Method for preparing semiconductor device with air gapNANYA TECHNOLOGY CORP·Filed 2023·Granted May 7, 2024·0 cites·19 claims
- 1073US2024365539A1Method of manufacturing memory device having active area in stripNANYA TECHNOLOGY CORP·Filed 2024·Application pending·0 cites
- 1172US12438040B2Method for preparing semiconductor device with air gapNANYA TECHNOLOGY CORP·Filed 2023·Granted Oct 7, 2025·0 cites·16 claims
- 1271US11114334B2Semiconductor device with air gap and method for preparing the sameNANYA TECHNOLOGY CORP·Filed 2019·Granted Sep 7, 2021·1 cites·10 claims
- 1369US11631735B2Semiconductor device with flowable layerNANYA TECHNOLOGY CORP·Filed 2022·Granted Apr 18, 2023·0 cites·8 claims
- 1469US2024128084A1Semiconductor device structure with patterns having coplanar bottom surfaces and method for preparing the sameNANYA TECHNOLOGY CORP·Filed 2023·Application pending·0 cites
- 1566US2024128083A1Semiconductor device structure with patterns having coplanar bottom surfaces and method for preparing the sameNANYA TECHNOLOGY CORP·Filed 2022·Application pending·0 cites
- 1665US11705364B2Method for preparing semiconductor device with air gapNANYA TECHNOLOGY CORP·Filed 2021·Granted Jul 18, 2023·0 cites·7 claims
- 1763US12232312B2Method of manufacturing semiconductor device having active area in stripNANYA TECHNOLOGY CORP·Filed 2022·Granted Feb 18, 2025·0 cites·16 claims
- 1862US11721610B2Method for manufacturing semiconductor structure sameNANYA TECHNOLOGY CORP·Filed 2021·Granted Aug 8, 2023·0 cites·11 claims
- 1960US11502165B2Semiconductor device with flowable layer and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2020·Granted Nov 15, 2022·0 cites·10 claims
- 2060US2022059411A1Method for fabricating semiconductor device with porous dielectric structureNANYA TECHNOLOGY CORP·Filed 2021·Application pending·0 cites
- 2156US11575017B2Semiconductor device with void-free contact and method for preparing the sameNANYA TECHNOLOGY CORP·Filed 2021·Granted Feb 7, 2023·0 cites·20 claims
- 2255US11985816B2Semiconductor device with air gapNANYA TECHNOLOGY CORP·Filed 2021·Granted May 14, 2024·0 cites·17 claims
- 2355US2021249310A1Semiconductor device with porous dielectric structure and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2020·Application pending·0 cites
- 2454US11706912B2Method for fabricating semiconductor device with air gapNANYA TECHNOLOGY CORP·Filed 2021·Granted Jul 18, 2023·0 cites·15 claims
- 2554US11183443B2Semiconductor structure and method for manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2019·Granted Nov 23, 2021·0 cites·9 claims
- 2652US2023284444A1Memory device having active area in strip and manufacturing method thereofNANYA TECHNOLOGY CORP·Filed 2022·Application pending·0 cites
- 2751US12148689B2Semiconductor device with interconnectors of different densityNANYA TECHNOLOGY CORP·Filed 2021·Granted Nov 19, 2024·0 cites·15 claims
- 2847US2022319991A1Semiconductor device with dual barrier layers and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2021·Application pending·0 cites
- 2944US2009017604A1Method for fabricating a semiconductor deviceNANYA TECHNOLOGY CORP·Filed 2007·Application pending·0 cites
- 3041US2020203143A1Method for preparing multilayer structureNANYA TECHNOLOGY CORP·Filed 2019·Application pending·0 cites
- 3136US7166542B2Method for fabricating passivation layerNANYA TECHNOLOGY CORP·Filed 2003·Granted Jan 23, 2007·0 cites·8 claims
- 3230US2019198095A1Memory deviceNANYA TECHNOLOGY CORP·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →