Inventor · disambiguated record
Li-Chung Hsu
Also filed as: HSU LI-CHUNG
28 granted patents·9 pending applications·63 citations·filing 2004–2024
94Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD24ALPHA NETWORKS INC3HSU LI-CHUNG3MUNIN CORP2GLASS CHRISTOPHER K1
Top patents by PatentIndex Score
37 records- 0197US11068637B1Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jul 20, 2021·9 cites·20 claims
- 0294US11853676B2Layout context-based cell timing characterizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 26, 2023·2 cites·20 claims
- 0390US7967401B2Systemic cabinetHSU LI-CHUNG·Filed 2009·Granted Jun 28, 2011·33 cites·12 claims
- 0489US11531802B2Layout context-based cell timing characterizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 20, 2022·5 cites·20 claims
- 0588US2024395622A1Integrated circuit in hybrid row height structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0687US2024332083A1Semiconductor device in hybrid row height structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0784US12369389B2Integrated circuit in hybrid row height structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jul 22, 2025·0 cites·20 claims
- 0884US2025124210A1Layout context-based cell timing characterizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0982US12210811B2Layout context-based cell timing characterizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jan 28, 2025·0 cites·20 claims
- 1082US2025086371A1Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1180US12175180B2Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 24, 2024·0 cites·20 claims
- 1279US12074069B2Semiconductor device and integrated circuit in hybrid row height structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 27, 2024·0 cites·20 claims
- 1379US11791213B2Integrated circuit in hybrid row height structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Oct 17, 2023·0 cites·20 claims
- 1476US7776527B2Methods and compositions for reducing microbial induced apoptosisUNIV CALIFORNIA·Filed 2004·Granted Aug 17, 2010·3 cites·2 claims
- 1574US9311440B2System and method of electromigration avoidance for automatic place-and-routeKAO JERRY·Filed 2012·Granted Apr 12, 2016·5 cites·20 claims
- 1673US11355395B2Integrated circuit in hybrid row height structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jun 7, 2022·0 cites·20 claims
- 1771US11816413B2Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Nov 14, 2023·0 cites·20 claims
- 1870US8826195B2Layout modification method and systemLEE MENG-XIANG·Filed 2012·Granted Sep 2, 2014·3 cites·20 claims
- 1968US10216879B1Method for establishing aging model of device and analyzing aging state of device with aging modelTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Feb 26, 2019·1 cites·20 claims
- 2068US9400866B2Layout modification method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jul 26, 2016·1 cites·20 claims
- 2168US7368538B2G+C-rich binding proteinMUNIN CORP·Filed 2004·Granted May 6, 2008·1 cites·1 claims
- 2267US11783106B2Circuit testing and manufacture using multiple timing librariesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Oct 10, 2023·0 cites·20 claims
- 2363US10977402B2Circuit testing and manufacture using multiple timing librariesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Apr 13, 2021·0 cites·20 claims
- 2461US7674607B2DNA encoding G+C-rich promoter binding proteinMUNIN CORP·Filed 2008·Granted Mar 9, 2010·0 cites·6 claims
- 2560US11003820B2Method of determining a worst case in timing analysisTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted May 11, 2021·0 cites·20 claims
- 2658US9122839B2Layout modification method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Sep 1, 2015·0 cites·20 claims
- 2757US10503849B2Circuit testing and manufacture using multiple timing librariesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 10, 2019·0 cites·20 claims
- 2854US10776545B2Method of determing a worst case in timing analysisTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Sep 15, 2020·0 cites·17 claims
- 2950US2009111786A1Compounds that Prevent Macrophage Apoptosis and Uses ThereofGLASS CHRISTOPHER K·Filed 2005·Application pending·0 cites
- 3048US2005011903A1Container handleFiled 2004·Application pending·0 cites
- 3147US10747924B2Method for manufacturing integrated circuit with aid of pattern based timing database indicating aging effectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Aug 18, 2020·0 cites·20 claims
- 3245US10176284B2Semiconductor circuit design and manufacture methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 8, 2019·0 cites·20 claims
- 3344US10567970B2Cloud radio access network system and control method thereofALPHA NETWORKS INC·Filed 2018·Granted Feb 18, 2020·0 cites·14 claims
- 3442US10785685B2Cloud radio access network system and control method thereofALPHA NETWORKS INC·Filed 2018·Granted Sep 22, 2020·0 cites·11 claims
- 3539US2020028789A1Cloud radio access network system and control method thereofALPHA NETWORKS INC·Filed 2018·Application pending·0 cites
- 3638US2017290416A1Inclination Adjusting Device for a DeskHSU LI-CHUNG·Filed 2017·Application pending·0 cites
- 3737US2017290415A1Inclination Adjusting Device for a DeskHSU LI-CHUNG·Filed 2016·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Li-Chung Hsu files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →