Inventor · disambiguated record
Li Li
Also filed as: LI LI-HONG
15 granted patents·6 pending applications·169 citations·filing 1999–2023
92Inventor score
Files withMOTOROLA INC6CISCO TECH INC4CHIA PIERRE CHOR-FUNG1FU TAI HUA IND SHENZHEN CO LTD1HONGFUJIN PREC IND SHENZHEN1
Top patents by PatentIndex Score
21 records- 0192US8802290B2Cathode composite material, method for making the same, and lithium ion battery using the sameUNIV TSINGHUA·Filed 2012·Granted Aug 12, 2014·19 cites·17 claims
- 0290US9337120B2Multi-chip module with multiple interposersLI LI·Filed 2012·Granted May 10, 2016·13 cites·24 claims
- 0389US6310403B1Method of manufacturing components and component thereofMOTOROLA INC·Filed 2000·Granted Oct 30, 2001·60 cites·41 claims
- 0484US7136274B2Embedded multilayer printed circuitMOTOROLA INC·Filed 2004·Granted Nov 14, 2006·32 cites·16 claims
- 0581US9414497B2Semiconductor package including an embedded circuit component within a support structure of the packageCISCO TECH INC·Filed 2015·Granted Aug 9, 2016·3 cites·16 claims
- 0673US9129908B2Manufacturing a semiconductor package including an embedded circuit component within a support structure of the packageSAVIC JOVICA·Filed 2011·Granted Sep 8, 2015·3 cites·20 claims
- 0772US2023290898A1Integrate stressor with ge photodiode using a substrate removal processCISCO TECH INC·Filed 2023·Application pending·0 cites
- 0870US6352192B1System and method to control solder reflow furnace with wafer surface characterizationMOTOROLA INC·Filed 2000·Granted Mar 5, 2002·15 cites·11 claims
- 0967US11742451B2Integrate stressor with Ge photodiode using a substrate removal processCISCO TECH INC·Filed 2020·Granted Aug 29, 2023·0 cites·15 claims
- 1066US7770273B2Method for fabricating piezoelectric elementJAPAN SCIENCE & TECH AGENCY·Filed 2005·Granted Aug 10, 2010·5 cites·6 claims
- 1158US6669079B2Conductive paste and semiconductor component having conductive bumps made from the conductive pasteMOTOROLA INC·Filed 2002·Granted Dec 30, 2003·5 cites·7 claims
- 1256US8421237B2Stacked memory layers having multiple orientations and through-layer interconnectsCHIA PIERRE CHOR-FUNG·Filed 2011·Granted Apr 16, 2013·2 cites·20 claims
- 1356US2024282722A1Ball grid array rf package configurationsINFINERA CORP·Filed 2023·Application pending·0 cites
- 1454US6451127B1Conductive paste and semiconductor component having conductive bumps made from the conductive pasteMOTOROLA INC·Filed 1999·Granted Sep 17, 2002·12 cites·12 claims
- 1546US2009248836A1Modem user management system and methodHONGFUJIN PREC IND SHENZHEN·Filed 2009·Application pending·0 cites
- 1645US2016064320A1Coupling of an interposer to a package substrateCISCO TECH INC·Filed 2014·Application pending·0 cites
- 1742US10768270B2Electronic device with laser marking function and laser marking methodFU TAI HUA IND SHENZHEN CO LTD·Filed 2018·Granted Sep 8, 2020·0 cites·16 claims
- 1840US2007000864A1Piezoelectric material working methodJAPAN SCIENCE AND TECHNOLGY AG·Filed 2004·Application pending·0 cites
- 1938US2013015557A1Semiconductor package including an external circuit elementYANG ZHIPING·Filed 2011·Application pending·0 cites
- 2036US6841736B2Current-carrying electronic component and method of manufacturing sameMOTOROLA INC·Filed 2002·Granted Jan 11, 2005·0 cites·25 claims
- 2129US8093921B2Monitoring of interconnect reliability using a programmable deviceKRISHNAN NANDAKUMAR·Filed 2009·Granted Jan 10, 2012·0 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →