Inventor · disambiguated record
Lishing Liu
Also filed as: LIU LISHING
16 granted patents·1,104 citations·filing 1987–1995
96Inventor score
Technology areasG06F
Files withIBM16
Top patents by PatentIndex Score
16 records- 0186US5418922AHistory table for set prediction for accessing a set associative cacheIBM·Filed 1992·Granted May 23, 1995·117 cites·8 claims
- 0286US5282274ATranslation of multiple virtual pages upon a TLB missIBM·Filed 1990·Granted Jan 25, 1994·121 cites·28 claims
- 0386US4775955ACache coherence mechanism based on lockingIBM·Filed 1987·Granted Oct 4, 1988·94 cites·4 claims
- 0484US5265232ACoherence control by data invalidation in selected processor caches without broadcasting to processor caches not having the dataIBM·Filed 1991·Granted Nov 23, 1993·121 cites·46 claims
- 0582US4980823ASequential prefetching with deconfirmationIBM·Filed 1990·Granted Dec 25, 1990·97 cites·24 claims
- 0681US5604882ASystem and method for empty notification from peer cache units to global storage control unit in a multiprocessor data processing systemIBM·Filed 1993·Granted Feb 18, 1997·96 cites·16 claims
- 0779US5148538ATranslation look ahead based cache accessIBM·Filed 1989·Granted Sep 15, 1992·85 cites·16 claims
- 0873US5317716AMultiple caches using state information indicating if cache line was previously modified and type of access rights granted to assign access rights to cache lineIBM·Filed 1992·Granted May 31, 1994·64 cites·8 claims
- 0970US5507028AHistory based branch prediction accessed via a history based earlier instruction addressIBM·Filed 1995·Granted Apr 9, 1996·62 cites·8 claims
- 1069US5230070AAccess authorization table for multi-processor cachesIBM·Filed 1992·Granted Jul 20, 1993·54 cites·8 claims
- 1168US5130922AMultiprocessor cache memory system using temporary access states and method for operating such a memoryIBM·Filed 1989·Granted Jul 14, 1992·38 cites·8 claims
- 1264US5392410AHistory table for prediction of virtual address translation for cache accessIBM·Filed 1992·Granted Feb 21, 1995·43 cites·10 claims
- 1363US5018063AMethod for reducing cross-interrogate delays in a multiprocessor systemIBM·Filed 1988·Granted May 21, 1991·31 cites·7 claims
- 1460US5210848AMulti-processor caches with large granularity exclusivity lockingIBM·Filed 1992·Granted May 11, 1993·36 cites·9 claims
- 1555US5214766AData prefetching based on store information in multi-processor cachesIBM·Filed 1992·Granted May 25, 1993·28 cites·17 claims
- 1650US5016168AMethod for storing into non-exclusive cache lines in multiprocessor systemsIBM·Filed 1988·Granted May 14, 1991·17 cites·1 claims
Join the waitlist — get patent alerts
Get an alert when Lishing Liu files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →