Inventor · disambiguated record
Liang-Gi Yao
Also filed as: YAO LIANG-GI
80 granted patents·13 pending applications·1,159 citations·filing 1996–2023
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG51VANGUARD INT SEMICONDUCT CORP17YAO LIANG-GI7TAIWAN SEMICONDUCTOR MFG CO LTD5LING PEICHING2
Top patents by PatentIndex Score
93 records- 0196US6656764B1Process for integration of a high dielectric constant gate insulator layer in a CMOS deviceTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Dec 2, 2003·111 cites·29 claims
- 0294US6706581B1Dual gate dielectric scheme: SiON for high performance devices and high k for low power devicesTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Mar 16, 2004·78 cites·31 claims
- 0393US6890811B2Dual gate dielectric scheme: SiON for high performance devices and high k for low power devicesTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted May 10, 2005·63 cites·23 claims
- 0490US8766379B2Multi-layer scavenging metal gate stack for ultra-thin interfacial dielectric layerLIU KUAN-TING·Filed 2011·Granted Jul 1, 2014·17 cites·15 claims
- 0590US7357838B2Relaxed silicon germanium substrate with low defect densityTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Apr 15, 2008·13 cites·24 claims
- 0690US6455330B1Methods to create high-k dielectric gate electrodes with backside cleaningTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Sep 24, 2002·51 cites·20 claims
- 0789US7410854B2Method of making FUSI gate and resulting structureTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Aug 12, 2008·16 cites·20 claims
- 0889US7071066B2Method and structure for forming high-k gatesTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jul 4, 2006·46 cites·11 claims
- 0987US8268683B2Method for reducing interfacial layer thickness for high-K and metal gate stackYAO LIANG-GI·Filed 2010·Granted Sep 18, 2012·6 cites·20 claims
- 1086US8470659B2Method for reducing interfacial layer thickness for high-k and metal gate stackYAO LIANG-GI·Filed 2012·Granted Jun 25, 2013·5 cites·20 claims
- 1185US9006056B2Method for reducing interfacial layer thickness for high-k and metal gate stackTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Apr 14, 2015·4 cites·20 claims
- 1285US7030024B2Dual-gate structure and method of fabricating integrated circuits having dual-gate structuresTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Apr 18, 2006·31 cites·35 claims
- 1385US6878610B1Relaxed silicon germanium substrate with low defect densityTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Apr 12, 2005·29 cites·10 claims
- 1483US7910467B2Method for treating layers of a gate stackTAIWAN SEMICONDUCTOR MFG·Filed 2009·Granted Mar 22, 2011·8 cites·23 claims
- 1583US6048775AMethod to make shallow trench isolation structure by HDP-CVD and chemical mechanical polish processesVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Apr 11, 2000·101 cites·9 claims
- 1681US10008418B2Method of semiconductor integrated circuit fabricationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jun 26, 2018·2 cites·20 claims
- 1781US9194804B2Stress analysis of 3-D structures using tip-enhanced Raman scattering technologyTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Nov 24, 2015·3 cites·20 claims
- 1881US8012824B2Process to make high-K transistor dielectricsTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Sep 6, 2011·5 cites·19 claims
- 1980US7592619B2Epitaxy layer and method of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Sep 22, 2009·14 cites·10 claims
- 2079US7732878B2MOS devices with continuous contact etch stop layerTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Jun 8, 2010·8 cites·9 claims
- 2179US5814564AEtch back method to planarize an interlayer having a critical HDP-CVD deposition processVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Sep 29, 1998·71 cites·11 claims
- 2279US5716890AStructure and method for fabricating an interlayer insulating filmVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Feb 10, 1998·55 cites·37 claims
- 2378US6100137AEtch stop layer used for the fabrication of an overlying crown shaped storage node structureVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Aug 8, 2000·51 cites·33 claims
- 2476US8294201B2High-k gate dielectric and method of manufactureYU CHEN-HUA·Filed 2011·Granted Oct 23, 2012·3 cites·20 claims
- 2575US7175709B2Epitaxy layer and method of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Feb 13, 2007·9 cites·12 claims
- 2674US7087480B1Process to make high-k transistor dielectricsTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Aug 8, 2006·15 cites·15 claims
- 2772US8603924B2Methods of forming gate dielectric materialYAO LIANG-GI·Filed 2011·Granted Dec 10, 2013·2 cites·21 claims
- 2872US7271450B2Dual-gate structure and method of fabricating integrated circuits having dual-gate structuresTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Sep 18, 2007·3 cites·14 claims
- 2972US5962344APlasma treatment method for PECVD silicon nitride films for improved passivation layers on semiconductor metal interconnectionsVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Oct 5, 1999·44 cites·25 claims
- 3071US8106469B2Methods and apparatus of fluorine passivationXU JEFF J·Filed 2010·Granted Jan 31, 2012·3 cites·20 claims
- 3170US8003548B2Atomic layer depositionTAIWAN SEMICONDUCTOR MFG·Filed 2010·Granted Aug 23, 2011·2 cites·8 claims
- 3270US7202142B2Method for producing low defect density strained -Si channel MOSFETSTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Apr 10, 2007·13 cites·23 claims
- 3370US6037276AMethod for improving patterning of a conductive layer in an integrated circuitVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted Mar 14, 2000·36 cites·12 claims
- 3469USRE43673EDual gate dielectric scheme: SiON for high performance devices and high K for low power devicesHOU TOU-HUNG·Filed 2006·Granted Sep 18, 2012·4 cites·32 claims
- 3569US7303996B2High-K gate dielectric stack plasma treatment to adjust threshold voltage characteristicsTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Dec 4, 2007·14 cites·20 claims
- 3669US6982208B2Method for producing high throughput strained-Si channel MOSFETSTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Jan 3, 2006·12 cites·27 claims
- 3768US9040393B2Method of forming semiconductor structureYAO LIANG-GI·Filed 2011·Granted May 26, 2015·2 cites·17 claims
- 3867US9893160B2Methods of forming gate dielectric materialTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Feb 13, 2018·1 cites·20 claims
- 3967US6235650B1Method for improved semiconductor device reliabilityVANGUARD INT SEMICONDUCT CORP·Filed 1997·Granted May 22, 2001·32 cites·7 claims
- 4067US6133613AAnti-reflection oxynitride film for tungsten-silicide substratesVANGUARD INT SEMICONDUCT CORP·Filed 1998·Granted Oct 17, 2000·32 cites·4 claims
- 4165US10861751B2Method of semiconductor integrated circuit fabricationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 8, 2020·0 cites·20 claims
- 4265US7998820B2High-k gate dielectric and method of manufactureTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Aug 16, 2011·2 cites·20 claims
- 4365US7393766B2Process for integration of a high dielectric constant gate insulator layer in a CMOS deviceTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Jul 1, 2008·2 cites·17 claims
- 4465US2025203841A1Dram cells and manufacturing methods thereofLING PEICHING·Filed 2023·Application pending·0 cites
- 4564US9257349B2Method of scavenging impurities in forming a gate stack having an interfacial layerTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Feb 9, 2016·1 cites·20 claims
- 4664US6861339B2Method for fabricating laminated silicon gate electrodeTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Mar 1, 2005·7 cites·14 claims
- 4764US6764927B1Chemical vapor deposition (CVD) method employing wetting pre-treatmentTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jul 20, 2004·9 cites·20 claims
- 4864US2025273509A1Semiconductor structure with etch stop layer and method for making the sameLING PEICHING·Filed 2023·Application pending·0 cites
- 4963US6914313B2Process for integration of a high dielectric constant gate insulator layer in a CMOS deviceTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jul 5, 2005·8 cites·12 claims
- 5062US10483170B2Method of semiconductor integrated circuit fabricationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Nov 19, 2019·0 cites·20 claims
Showing the top 50 of 93 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →