Inventor · disambiguated record
Logan I. Friedman
Also filed as: FRIEDMAN LOGAN I · FRIEDMAN LOGAN IAN
4 granted patents·2 citations·filing 2017–2021
57Inventor score
Files withIBM4
Top patents by PatentIndex Score
4 records- 0187US11646861B2Low-latency, high-availability and high-speed SerDes interface having multiple synchronization modesIBM·Filed 2021·Granted May 9, 2023·2 cites·25 claims
- 0257US11907074B2Low-latency deserializer having fine granularity and defective-lane compensationIBM·Filed 2021·Granted Feb 20, 2024·0 cites·20 claims
- 0343US10642535B2Register access in a distributed memory buffer systemIBM·Filed 2018·Granted May 5, 2020·0 cites·20 claims
- 0436US10393805B2JTAG support over a broadcast bus in a distributed memory buffer systemIBM·Filed 2017·Granted Aug 27, 2019·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →