Inventor · disambiguated record
Lukas Dällenbach
Also filed as: DÄLLENBACH LUKAS
3 granted patents·1 citations·filing 2017–2018
46Inventor score
Technology areasG06F
Files withIBM3
Top patents by PatentIndex Score
3 records- 0161US10719654B2Placement and timing aware wire taggingIBM·Filed 2017·Granted Jul 21, 2020·1 cites·14 claims
- 0247US10747934B2Managing feedthrough wiring for integrated circuitsIBM·Filed 2018·Granted Aug 18, 2020·0 cites·20 claims
- 0343US10572618B2Enabling automatic staging for nets or net groups with VHDL attributesIBM·Filed 2017·Granted Feb 25, 2020·0 cites·17 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →