Inventor · disambiguated record
Luc Montperrus
Also filed as: MONTPERRUS LUC
7 granted patents·4 pending applications·19 citations·filing 1989–2022
77Inventor score
Top patents by PatentIndex Score
11 records- 0171US8522104B2Smart aging retry bufferMARTIN PHILIPPE·Filed 2011·Granted Aug 27, 2013·3 cites·11 claims
- 0257US7148728B2Digital delay device, digital oscillator clock signal generator and memory interfaceARTERIS·Filed 2004·Granted Dec 12, 2006·10 cites·16 claims
- 0353US11940939B2Encoding byte information on a data bus with separate codeQUALCOMM INC·Filed 2022·Granted Mar 26, 2024·0 cites·22 claims
- 0451US2010122004A1Message switching systemARTERIS·Filed 2009·Application pending·0 cites
- 0547US7639704B2Message switching systemARTERIS·Filed 2006·Granted Dec 29, 2009·0 cites·16 claims
- 0645US10606339B2Coherent interconnect power reduction using hardware controlled split snoop directoriesQUALCOMM INC·Filed 2016·Granted Mar 31, 2020·0 cites·30 claims
- 0742US2007271538A1Process for designing a circuit for synchronizing data asychronously exchanged between two synchronous blocks, and synchronization circuit fabricated by sameLUC MONTPERRUS·Filed 2006·Application pending·0 cites
- 0840US2007081414A1System and method of on-circuit asynchronous communication, between synchronous subcircuitsDOUADY CESAR·Filed 2006·Application pending·0 cites
- 0937US2007002634A1System and method of transmitting data in an electronic circuitMONTPERRUS LUC·Filed 2005·Application pending·0 cites
- 1034US7755920B2Electronic memory deviceARTERIS·Filed 2008·Granted Jul 13, 2010·0 cites·10 claims
- 1132US4942549ARecursive adder for calculating the sum of two operandsFRANCE ETAT·Filed 1989·Granted Jul 17, 1990·6 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →