Inventor · disambiguated record
Marco Burzio
Also filed as: BURZIO MARCO
10 granted patents·148 citations·filing 1996–2000
89Inventor score
Top patents by PatentIndex Score
10 records- 0183US6259327B1PLL having circuits for selecting optimum VCO input/output characteristicsCSELT CENTRO STUDI LAB TELECOM·Filed 1999·Granted Jul 10, 2001·64 cites·12 claims
- 0253US6127896APhase locked loop having control circuit for automatically operating VCO on an optimum input/output characteristicCSELT CENTRO STUDI LAB TELECOM·Filed 1998·Granted Oct 3, 2000·18 cites·10 claims
- 0346US6292039B1Integrated circuit phase-locked loop charge pumpTELECOM ITALIA LAB SPA·Filed 2000·Granted Sep 18, 2001·6 cites·11 claims
- 0445US5790058ASerializing-parallelizing circuit for high speed digital signalsCSELT CENTRO STUDI LAB TELECOM·Filed 1996·Granted Aug 4, 1998·13 cites·7 claims
- 0544US6067334ADevice for and method of aligning in time digital signals, for example a clock signal and data streamCSELT CENTRO STUDI LAB TELECOM·Filed 1997·Granted May 23, 2000·20 cites·30 claims
- 0640US6218886B1Device for compensating process and operating parameter variations in CMOS integrated circuitsCSELT CENTRO STUDI LAB TELECOM·Filed 1999·Granted Apr 17, 2001·8 cites·13 claims
- 0737US5686849ACircuit for clock signal extraction from a high speed data streamCSELT CENTRO STUDI LAB TELECOM·Filed 1996·Granted Nov 11, 1997·8 cites·2 claims
- 0832US6255881B1High tunability CMOS delay elementCSELT CENTRO STUDI LAB TELECOM·Filed 1999·Granted Jul 3, 2001·3 cites·3 claims
- 0930US6166587ACMOS circuit for generating a current reference, the circuit comprising a transistor in a weak inversion regionCSELT CENTRO STUDI LAB TELECOM·Filed 1999·Granted Dec 26, 2000·3 cites·8 claims
- 1026US5828246ACircuit in CMOS technology for high speed driving of optical sourcesCSELT STUDI E LAB TELECOMUNI C·Filed 1997·Granted Oct 27, 1998·5 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →