Inventor · disambiguated record
Maria-Luisa Gallese
Also filed as: GALLESE MARIA L · GALLESE MARIA LUISA
15 granted patents·1 pending application·28 citations·filing 2002–2018
89Inventor score
Files withMICRON TECHNOLOGY INC10DE SANTIS LUCA3DI IORIO ERCOLE ROSARIO1MOSCHIANO VIOLANTE1PILOLLI LUIGI1
Top patents by PatentIndex Score
16 records- 0188US9502125B2Concurrently reading first and second pages of memory cells having different page addressesMICRON TECHNOLOGY INC·Filed 2014·Granted Nov 22, 2016·8 cites·29 claims
- 0272US9779826B1Memory devices for reading memory cells of different memory planesMICRON TECHNOLOGY INC·Filed 2017·Granted Oct 3, 2017·2 cites·21 claims
- 0371US9754674B2Concurrently reading first and second pages of memory cells having different page addressesMICRON TECHNOLOGY INC·Filed 2016·Granted Sep 5, 2017·2 cites·20 claims
- 0463US9349423B2Single node power management for multiple memory devicesMICRON TECHNOLOGY INC·Filed 2014·Granted May 24, 2016·2 cites·17 claims
- 0562US9406388B2Memory area protection system and methodsDE SANTIS LUCA·Filed 2007·Granted Aug 2, 2016·2 cites·33 claims
- 0662US8804452B2Data interleaving modulePILOLLI LUIGI·Filed 2012·Granted Aug 12, 2014·2 cites·40 claims
- 0762US7117402B2Background block erase check for flash memoriesMICRON TECHNOLOGY INC·Filed 2002·Granted Oct 3, 2006·10 cites·36 claims
- 0850US10037809B2Memory devices for reading memory cells of different memory planesMICRON TECHNOLOGY INC·Filed 2017·Granted Jul 31, 2018·0 cites·20 claims
- 0948US10446258B2Methods and apparatus for providing redundancy in memoryMICRON TECHNOLOGY INC·Filed 2017·Granted Oct 15, 2019·0 cites·20 claims
- 1046US9779839B2Methods for providing redundancy in a memory array comprising mapping portions of data associated with a defective addressMICRON TECHNOLOGY INC·Filed 2015·Granted Oct 3, 2017·0 cites·17 claims
- 1145US9189440B2Data interleaving moduleMICRON TECHNOLOGY INC·Filed 2014·Granted Nov 17, 2015·0 cites·20 claims
- 1244US9202569B2Methods for providing redundancy and apparatusesMOSCHIANO VIOLANTE·Filed 2011·Granted Dec 1, 2015·0 cites·14 claims
- 1342US10170167B2Single node power management for multiple memory devicesMICRON TECHNOLOGY INC·Filed 2016·Granted Jan 1, 2019·0 cites·18 claims
- 1442US9513912B2Memory controllersDE SANTIS LUCA·Filed 2012·Granted Dec 6, 2016·0 cites·27 claims
- 1535US10528292B2Power down/power-loss memory controllerDE SANTIS LUCA·Filed 2018·Granted Jan 7, 2020·0 cites·22 claims
- 1623US2010031096A1Internal fail bit or byte counterDI IORIO ERCOLE ROSARIO·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →