Inventor · disambiguated record
Mark I. Garnder
Also filed as: GARDNER MARK I · GARNDER MARK I
4 granted patents·115 citations·filing 1996–1998
80Inventor score
Files withADVANCED MICRO DEVICES INC4
Top patents by PatentIndex Score
4 records- 0179US5852310AMulti-level transistor fabrication method with a patterned upper transistor substrate and interconnection theretoADVANCED MICRO DEVICES INC·Filed 1998·Granted Dec 22, 1998·48 cites·9 claims
- 0269US5731217AMulti-level transistor fabrication method with a filled upper transistor substrate and interconnection theretoADVANCED MICRO DEVICES INC·Filed 1996·Granted Mar 24, 1998·34 cites·19 claims
- 0355US5770482AMulti-level transistor fabrication method with a patterned upper transistor substrate and interconnection theretoADVANCED MICRO DEVICES INC·Filed 1996·Granted Jun 23, 1998·18 cites·18 claims
- 0453US5863818AMultilevel transistor fabrication method having an inverted, upper level transistorADVANCED MICRO DEVICES INC·Filed 1996·Granted Jan 26, 1999·15 cites·15 claims
Join the waitlist — get patent alerts
Get an alert when Mark I. Garnder files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →