Inventor · disambiguated record
Matthew Murdy Griffin
Also filed as: CHAN ANDY PENG-PUI · GRIFFIN MATTHEW M · GRIFFIN MATTHEW MURDY
32 granted patents·3 pending applications·2,318 citations·filing 1993–2012
98Inventor score
Top patents by PatentIndex Score
35 records- 0199US6496897B2Semiconductor memory device which receives write masking informationRAMBUS INC·Filed 2001·Granted Dec 17, 2002·148 cites·39 claims
- 0298US6493789B2Memory device which receives write masking and automatic precharge informationRAMBUS INC·Filed 2001·Granted Dec 10, 2002·147 cites·36 claims
- 0398US5748914AProtocol for communication with dynamic memoryRAMBUS INC·Filed 1995·Granted May 5, 1998·227 cites·19 claims
- 0497US5337285AMethod and apparatus for power control in devicesRAMBUS INC·Filed 1993·Granted Aug 9, 1994·193 cites·36 claims
- 0596US6681288B2Memory device with receives write masking informationRAMBUS INC·Filed 2002·Granted Jan 20, 2004·85 cites·39 claims
- 0696US6470405B2Protocol for communication with dynamic memoryRAMBUS INC·Filed 2001·Granted Oct 22, 2002·86 cites·37 claims
- 0796US6266737B1Method and apparatus for providing a memory with write enable informationRAMBUS INC·Filed 2000·Granted Jul 24, 2001·81 cites·25 claims
- 0896US6094075ACurrent control techniqueRAMBUS INC·Filed 1998·Granted Jul 25, 2000·114 cites·33 claims
- 0996US5446696AMethod and apparatus for implementing refresh in a synchronous DRAM systemRAMBUS INC·Filed 1994·Granted Aug 29, 1995·153 cites·10 claims
- 1095US6591353B1Protocol for communication with dynamic memoryRAMBUS INC·Filed 2000·Granted Jul 8, 2003·88 cites·26 claims
- 1195US6462591B2Semiconductor memory device having a controlled output driver characteristicRAMBUS INC·Filed 2001·Granted Oct 8, 2002·115 cites·41 claims
- 1294US7287109B2Method of controlling a memory device having a memory coreRAMBUS INC·Filed 2004·Granted Oct 23, 2007·57 cites·25 claims
- 1394US6608507B2Memory system including a memory device having a controlled output driver characteristicRAMBUS INC·Filed 2002·Granted Aug 19, 2003·91 cites·45 claims
- 1493US6810449B1Protocol for communication with dynamic memoryRAMBUS INC·Filed 2000·Granted Oct 26, 2004·75 cites·21 claims
- 1593US6556052B2Semiconductor controller device having a controlled output driver characteristicRAMBUS INC·Filed 2001·Granted Apr 29, 2003·68 cites·40 claims
- 1691US6035369AMethod and apparatus for providing a memory with write enable informationRAMBUS INC·Filed 1995·Granted Mar 7, 2000·55 cites·52 claims
- 1791US5872996AMethod and apparatus for transmitting memory requests by transmitting portions of count data in adjacent words of a packetRAMBUS INC·Filed 1997·Granted Feb 16, 1999·135 cites·5 claims
- 1890US6870419B1Memory system including a memory device having a controlled output driver characteristicRAMBUS INC·Filed 2003·Granted Mar 22, 2005·45 cites·42 claims
- 1990US6294934B1Current control techniqueRAMBUS INC·Filed 2000·Granted Sep 25, 2001·47 cites·31 claims
- 2089US6931467B2Memory integrated circuit device which samples data upon detection of a strobe signalRAMBUS INC·Filed 2002·Granted Aug 16, 2005·33 cites·46 claims
- 2187US5913046AProtocol for communication with dynamic memoryRAMBUS INC·Filed 1997·Granted Jun 15, 1999·49 cites·9 claims
- 2284US6122688AProtocol for communication with dynamic memoryRAMBUS INC·Filed 1997·Granted Sep 19, 2000·40 cites·5 claims
- 2379US5966731AProtocol for communication with dynamic memoryRAMBUS INC·Filed 1997·Granted Oct 12, 1999·31 cites·14 claims
- 2476US6975160B2System including an integrated circuit memory device having an adjustable output voltage settingRAMBUS INC·Filed 2004·Granted Dec 13, 2005·15 cites·35 claims
- 2574US5896545ATransmitting memory requests for multiple block format memory operations the requests comprising count information, a mask, and a second maskRAMBUS INC·Filed 1997·Granted Apr 20, 1999·47 cites·14 claims
- 2672US5715407AProcess and apparatus for collision detection on a parallel bus by monitoring a first line of the bus during even bus cycles for indications of overlapping packetsRAMBUS INC·Filed 1996·Granted Feb 3, 1998·46 cites·25 claims
- 2769US5765020AMethod of transferring data by transmitting lower order and upper odermemory address bits in separate words with respective op codes and start informationRAMBUS INC·Filed 1997·Granted Jun 9, 1998·38 cites·11 claims
- 2866US7167039B2Memory device having an adjustable voltage swing settingRAMBUS INC·Filed 2004·Granted Jan 23, 2007·6 cites·52 claims
- 2951US7352234B2Current control techniqueRAMBUS INC·Filed 2007·Granted Apr 1, 2008·1 cites·17 claims
- 3051USRE39879EMethod of transferring data by transmitting lower order and upper order memory address bits in separate words with respective op codes and start informationRAMBUS INC·Filed 2000·Granted Oct 9, 2007·1 cites·41 claims
- 3150US6975159B2Method of operation in a system having a memory device having an adjustable output voltage settingRAMBUS INC·Filed 2004·Granted Dec 13, 2005·0 cites·35 claims
- 3247US2012201089A1Integrated circuit device comprises an interface to transmit a first code, a strobe signal after a delay and data to a dynamic random access memory (dram)BARTH RICHARD MAURICE·Filed 2012·Application pending·0 cites
- 3343US2008043546A1Method of Controlling A Memory Device Having a Memory CoreRAMBUS INC·Filed 2007·Application pending·0 cites
- 3441US6912620B2Memory device which receives write masking informationRAMBUS INC·Filed 2003·Granted Jun 28, 2005·1 cites·46 claims
- 3541US2005188150A1Method and apparatus for providing a memory with write enable informationFiled 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →