Inventor · disambiguated record
Makoto Hanawa
Also filed as: HANAWA MAKOTO
35 granted patents·1 pending application·695 citations·filing 1985–2005
98Inventor score
Top patents by PatentIndex Score
36 records- 0185US6333645B1Clocked logic gate circuitHITACHI LTD·Filed 2000·Granted Dec 25, 2001·23 cites·8 claims
- 0282US5386394ASemiconductor memory device for performing parallel operations on hierarchical data linesHITACHI LTD·Filed 1993·Granted Jan 31, 1995·49 cites·16 claims
- 0380US5375215AMultiprocessor system having shared memory divided into a plurality of banks with access queues corresponding to each bankHITACHI LTD·Filed 1991·Granted Dec 20, 1994·74 cites·4 claims
- 0470US4845614AMicroprocessor for retrying data transferHITACHI LTD·Filed 1987·Granted Jul 4, 1989·40 cites·8 claims
- 0567US4989140ASingle chip pipeline data processor using instruction and operand cache memories for parallel operation of instruction control and executions unitHITACHI LTD·Filed 1989·Granted Jan 29, 1991·21 cites·48 claims
- 0666US4745302AAsynchronous signal synchronizing circuitHITACHI LTD·Filed 1985·Granted May 17, 1988·37 cites·7 claims
- 0764US5253197ASemiconductor associative memory device with current sensingHITACHI LTD·Filed 1990·Granted Oct 12, 1993·24 cites·13 claims
- 0863US7451491B2Method and a device for allowing only a specific kind of hardware to correctly execute softwareOKI ELECTRIC IND CO LTD·Filed 2005·Granted Nov 11, 2008·4 cites·15 claims
- 0963US4894799AContent-addressable memoryHITACHI LTD·Filed 1988·Granted Jan 16, 1990·20 cites·7 claims
- 1059US6078983AMultiprocessor system having distinct data bus and address bus arbitersHITACHI LTD·Filed 1997·Granted Jun 20, 2000·30 cites·7 claims
- 1159US6052776ABranch operation system where instructions are queued until preparations is ascertained to be completed and branch distance is considered as an execution conditionHITACHI LTD·Filed 1997·Granted Apr 18, 2000·36 cites·9 claims
- 1258US6316961B2Clocked logic gate circuitHITACHI LTD·Filed 2000·Granted Nov 13, 2001·6 cites·7 claims
- 1357US5301285AData processor having two instruction registers connected in cascade and two instruction decodersHITACHI LTD·Filed 1992·Granted Apr 5, 1994·32 cites·8 claims
- 1456US5125095ASystem using microprocessor address lines for coprocessor selection within a multi-coprocessor apparatusHITACHI MICROCUMPUTER ENG·Filed 1991·Granted Jun 23, 1992·30 cites·13 claims
- 1555US5572151APass transistor type selector circuit and digital logic circuitHITACHI LTD·Filed 1995·Granted Nov 5, 1996·30 cites·18 claims
- 1655US5269007ARISC system capable of simultaneously executing data interlocked shift and arithmetic/logic instructions in one clock cycle by bypassing registerHITACHI LTD·Filed 1990·Granted Dec 7, 1993·29 cites·6 claims
- 1755US4942521AMicroprocessor with a cache memory in which validity flags for first and second data areas are simultaneously readableHITACHI LTD·Filed 1987·Granted Jul 17, 1990·21 cites·12 claims
- 1854US6282505B1Multi-port memory and a data processor accessing the sameHITACHI LTD·Filed 1996·Granted Aug 28, 2001·28 cites·10 claims
- 1953US5878254AInstruction branching method and a processorHITACHI LTD·Filed 1998·Granted Mar 2, 1999·23 cites·1 claims
- 2052US5740401AMultiprocessor system having a processor invalidating operand cache when lock-accessingHITACHI LTD·Filed 1993·Granted Apr 14, 1998·25 cites·3 claims
- 2151US5381531AData processor for selective simultaneous execution of a delay slot instruction and a second subsequent instruction the pair following a conditional branch instructionHITACHI LTD·Filed 1991·Granted Jan 10, 1995·24 cites·9 claims
- 2248US5790845ASystem with reservation instruction execution to store branch target address for use upon reaching the branch pointHITACHI LTD·Filed 1996·Granted Aug 4, 1998·18 cites·15 claims
- 2348US2004177231A1Data processorHITACHI LTD·Filed 2004·Application pending·0 cites
- 2447US5148532APipeline processor with prefetch circuitHITACHI LTD·Filed 1990·Granted Sep 15, 1992·19 cites·10 claims
- 2546US5881078ALogic circuit having error detection function and processor including the logic circuitHITACHI LTD·Filed 1997·Granted Mar 9, 1999·19 cites·22 claims
- 2645US6779102B2Data processor capable of executing an instruction that makes a cache memory ineffectiveHITACHI LTD·Filed 2001·Granted Aug 17, 2004·0 cites·89 claims
- 2743US5206945ASingle-chip pipeline processor for fetching/flushing instruction/data caches in response to first/second hit/mishit signal respectively detected in corresponding to their logical addressesHITACHI LTD·Filed 1990·Granted Apr 27, 1993·15 cites·42 claims
- 2836US6476644B2Clocked logic gate circuitHITACHI LTD·Filed 2000·Granted Nov 5, 2002·0 cites·3 claims
- 2936US5654651ACMOS static logic circuitHITACHI LTD·Filed 1995·Granted Aug 5, 1997·4 cites·18 claims
- 3035US6272596B1Data processorHITACHI LTD·Filed 1999·Granted Aug 7, 2001·3 cites·8 claims
- 3133US5809274APurge control for ON-chip cache memoryHITACHI LTD·Filed 1997·Granted Sep 15, 1998·2 cites·4 claims
- 3232US5129075AData processor with on-chip logical addressing and off-chip physical addressingHITACHI LTD·Filed 1990·Granted Jul 7, 1992·2 cites·9 claims
- 3331US5974533AData processorHITACHI LTD·Filed 1998·Granted Oct 26, 1999·1 cites·4 claims
- 3431US5349672AData processor having logical address memories and purge capabilitiesHITACHI LTD·Filed 1990·Granted Sep 20, 1994·3 cites·54 claims
- 3530US5680631AData processor with on-chip cache memory and purge controller responsive to external signal for controlling access to the cache memoryHITACHI LTD·Filed 1992·Granted Oct 21, 1997·0 cites·6 claims
- 3630US5557760AIntegrated circuit data processor including a control pin for deactivating the driving of a data bus without deactivating that of an address busHITACHI LTD·Filed 1993·Granted Sep 17, 1996·3 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →