Inventor · disambiguated record
Mahantesh Hanchinal
Also filed as: HANCHINAL MAHANTESH
4 granted patents·18 citations·filing 2016–2022
72Inventor score
Technology areasH10P
Files withTAIWAN SEMICONDUCTOR MFG CO LTD4
Top patents by PatentIndex Score
4 records- 0193US10402529B2Method and layout of an integrated circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Sep 3, 2019·10 cites·20 claims
- 0291US11341308B2Method and layout of an integrated circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted May 24, 2022·2 cites·20 claims
- 0391US10936780B2Method and layout of an integrated circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Mar 2, 2021·6 cites·20 claims
- 0476US11714947B2Method and layout of an integrated circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 1, 2023·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →