Inventor · disambiguated record
Marcel Mitran
Also filed as: MITRAN MARCEL · MITRAN MARCEL M
88 granted patents·13 pending applications·515 citations·filing 2004–2023
99Inventor score
Top patents by PatentIndex Score
101 records- 0196US7770161B2Post-register allocation profile directed instruction schedulingIBM·Filed 2005·Granted Aug 3, 2010·73 cites·18 claims
- 0295US9280448B2Controlling operation of a run-time instrumentation facility from a lesser-privileged stateIBM·Filed 2013·Granted Mar 8, 2016·25 cites·8 claims
- 0395US8880959B2Transaction diagnostic blockGREINER DAN F·Filed 2012·Granted Nov 4, 2014·25 cites·19 claims
- 0495US8850166B2Load pair disjoint facility and instruction thereforeJACOBI CHRISTIAN·Filed 2010·Granted Sep 30, 2014·37 cites·17 claims
- 0594US9996360B2Transaction abort instruction specifying a reason for abortIBM·Filed 2016·Granted Jun 12, 2018·9 cites·20 claims
- 0694US9983883B2Transaction abort instruction specifying a reason for abortIBM·Filed 2016·Granted May 29, 2018·9 cites·10 claims
- 0793US8683423B2Mining sequential patterns in weighted directed graphsAMARAL JOSE NELSON·Filed 2012·Granted Mar 25, 2014·41 cites·10 claims
- 0892US10360033B2Conditional transaction end instructionIBM·Filed 2018·Granted Jul 23, 2019·5 cites·20 claims
- 0992US9454370B2Conditional transaction end instructionIBM·Filed 2014·Granted Sep 27, 2016·11 cites·17 claims
- 1092US8887003B2Transaction diagnostic blockIBM·Filed 2013·Granted Nov 11, 2014·15 cites·12 claims
- 1191US10185588B2Transaction begin/end instructionsIBM·Filed 2016·Granted Jan 22, 2019·6 cites·20 claims
- 1291US8428930B2Page mapped spatially aware emulation of a computer instruction setBOHIZIC THEODORE J·Filed 2009·Granted Apr 23, 2013·26 cites·7 claims
- 1390US7617493B2Defining memory indifferent trace handlesIBM·Filed 2007·Granted Nov 10, 2009·19 cites·9 claims
- 1489US10235174B2Conditional instruction end operationIBM·Filed 2017·Granted Mar 19, 2019·4 cites·20 claims
- 1589US10025589B2Conditional transaction end instructionIBM·Filed 2016·Granted Jul 17, 2018·4 cites·20 claims
- 1689US9158566B2Page mapped spatially aware emulation of computer instruction setIBM·Filed 2012·Granted Oct 13, 2015·12 cites·14 claims
- 1789US8689172B2Mining sequential patterns in weighted directed graphsAMARAL JOSE NELSON·Filed 2009·Granted Apr 1, 2014·26 cites·12 claims
- 1889US8301434B2Host cell spatially aware emulation of a guest wild branchBOHIZIC THEODORE J·Filed 2009·Granted Oct 30, 2012·23 cites·22 claims
- 1986US10671390B2Conditional instruction end operationIBM·Filed 2017·Granted Jun 2, 2020·3 cites·11 claims
- 2086US8819647B2Performance improvements for nested virtual machinesMITRAN MARCEL·Filed 2008·Granted Aug 26, 2014·17 cites·20 claims
- 2186US8448157B2Eliminating redundant operations for common properties using shared real registersMITRAN MARCEL·Filed 2010·Granted May 21, 2013·12 cites·18 claims
- 2285US9335993B2Convert from zoned format to decimal floating point formatCARLOUGH STEVEN R·Filed 2011·Granted May 10, 2016·6 cites·17 claims
- 2384US9424035B2Conditional transaction end instructionIBM·Filed 2014·Granted Aug 23, 2016·4 cites·11 claims
- 2483US9558032B2Conditional instruction end operationIBM·Filed 2014·Granted Jan 31, 2017·4 cites·16 claims
- 2583US9547523B2Conditional instruction end operationIBM·Filed 2014·Granted Jan 17, 2017·4 cites·8 claims
- 2683US9268543B1Efficient code cache management in presence of infrequently used complied code fragmentsIBM·Filed 2014·Granted Feb 23, 2016·7 cites·18 claims
- 2783US8914619B2High-word facility for extending the number of general purpose registers available to instructionsGREINER DAN F·Filed 2010·Granted Dec 16, 2014·6 cites·21 claims
- 2881US10169038B2Compare and delay instructionsIBM·Filed 2014·Granted Jan 1, 2019·4 cites·11 claims
- 2981US10120681B2Compare and delay instructionsIBM·Filed 2014·Granted Nov 6, 2018·4 cites·20 claims
- 3081US8768683B2Self initialized host cell spatially aware emulation of a computer instruction setIBM·Filed 2013·Granted Jul 1, 2014·5 cites·15 claims
- 3179US9280346B2Run-time instrumentation reportingIBM·Filed 2013·Granted Mar 8, 2016·4 cites·7 claims
- 3277US10452288B2Identifying processor attributes based on detecting a guarded storage eventIBM·Filed 2017·Granted Oct 22, 2019·2 cites·20 claims
- 3377US9329861B2Convert to zoned format from decimal floating point formatCARLOUGH STEVEN R·Filed 2011·Granted May 3, 2016·3 cites·15 claims
- 3477US8447583B2Self initialized host cell spatially aware emulation of a computer instruction setBOHIZIC THEODORE J·Filed 2009·Granted May 21, 2013·7 cites·6 claims
- 3576US10725685B2Load logical and shift guarded instructionIBM·Filed 2017·Granted Jul 28, 2020·2 cites·20 claims
- 3675US10831476B2Compare and delay instructionsIBM·Filed 2018·Granted Nov 10, 2020·1 cites·20 claims
- 3775US9335994B2Convert from zoned format to decimal floating point formatIBM·Filed 2014·Granted May 10, 2016·2 cites·10 claims
- 3873US8250557B2Configuring a dependency graph for dynamic by-pass instruction schedulingMITRAN MARCEL·Filed 2008·Granted Aug 21, 2012·5 cites·12 claims
- 3971US9052889B2Load pair disjoint facility and instruction thereforIBM·Filed 2012·Granted Jun 9, 2015·2 cites·26 claims
- 4071US8438340B2Executing atomic store disjoint instructionsBOHIZIC THEODORE J·Filed 2010·Granted May 7, 2013·3 cites·5 claims
- 4171US7908596B2Automatic inspection of compiled codeIBM·Filed 2007·Granted Mar 15, 2011·5 cites·20 claims
- 4269US9529838B2Transactional lock elision with delayed lock checkingIBM·Filed 2014·Granted Dec 27, 2016·1 cites·6 claims
- 4369US8639492B2Accelerated execution for emulated environmentsBOGSANYL FRANCIS·Filed 2010·Granted Jan 28, 2014·5 cites·20 claims
- 4468US9529598B2Transaction abort instructionIBM·Filed 2013·Granted Dec 27, 2016·1 cites·9 claims
- 4568US9460145B2Transactional lock elision with delayed lock checkingIBM·Filed 2013·Granted Oct 4, 2016·1 cites·11 claims
- 4668US8490073B2Controlling tracing within compiled codeMITRAN MARCEL·Filed 2007·Granted Jul 16, 2013·4 cites·20 claims
- 4768US7930686B2Defining memory indifferent trace handlesIBM·Filed 2009·Granted Apr 19, 2011·4 cites·19 claims
- 4867US10956156B2Conditional transaction end instructionIBM·Filed 2019·Granted Mar 23, 2021·0 cites·20 claims
- 4967US10901736B2Conditional instruction end operationIBM·Filed 2019·Granted Jan 26, 2021·0 cites·20 claims
- 5067US9477514B2Transaction begin/end instructionsIBM·Filed 2013·Granted Oct 25, 2016·1 cites·7 claims
Showing the top 50 of 101 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →