Inventor · disambiguated record
Mahadevamurty Nemani
Also filed as: NEMANI MAHADEVAMURTY
11 granted patents·9 pending applications·99 citations·filing 1999–2024
87Inventor score
Top patents by PatentIndex Score
20 records- 0185US6922798B2Apparatus and methods for providing enhanced redundancy for an on-die cacheINTEL CORP·Filed 2002·Granted Jul 26, 2005·44 cites·59 claims
- 0270US7164616B2Memory array leakage reduction circuit and methodINTEL CORP·Filed 2004·Granted Jan 16, 2007·15 cites·16 claims
- 0369US7345947B2Memory array leakage reduction circuit and methodINTEL CORP·Filed 2006·Granted Mar 18, 2008·6 cites·18 claims
- 0461US9519041B2System and method for providing an accurate and cost-effective current sensor calibrationQUALCOMM INC·Filed 2014·Granted Dec 13, 2016·1 cites·19 claims
- 0559US12455614B2Power limiting in a processor-based system based on allocating power budgets for different sub-systems based on multiple time-based power limitsQUALCOMM INC·Filed 2023·Granted Oct 28, 2025·0 cites·35 claims
- 0658US2025341550A1Systems and methods for performing rail power telemetry in a system-on-a-chip (soc)QUALCOMM INC·Filed 2024·Application pending·0 cites
- 0756US12468377B2Processors including power control circuits to reduce a no-load voltage to save power and increase longevity and related methodsQUALCOMM INC·Filed 2023·Granted Nov 11, 2025·0 cites·30 claims
- 0856US6631444B2Cache architecture for pipelined operation with on-die processorINTEL CORP·Filed 2001·Granted Oct 7, 2003·5 cites·23 claims
- 0953US2025328185A1Novel platform skin temperature management in computer systemsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1052US12405651B2Autonomously managing core cluster frequencies using performance statistics in processor devicesQUALCOMM INC·Filed 2023·Granted Sep 2, 2025·0 cites·34 claims
- 1152US2025224787A1Performing thermal management based on temperature evolution models in processor devicesQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1250US6327552B2Method and system for determining optimal delay allocation to datapath blocks based on area-delay and power-delay curvesINTEL CORP·Filed 1999·Granted Dec 4, 2001·26 cites·15 claims
- 1350US2025348097A1Control loop sub-system voltage managementQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1450US2025377712A1Subsystem Operating Voltage ManagementQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1547US2016070327A1System and method for peak current management to a system on a chipQUALCOMM INC·Filed 2014·Application pending·0 cites
- 1647US2025094182A1PERFORMING DYNAMIC MICROARCHITECTURAL THROTTLING OF PROCESSOR CORES BASED ON QUALITY-OF-SERVICE (QoS) LEVELS IN PROCESSOR DEVICESQUALCOMM INC·Filed 2023·Application pending·0 cites
- 1746US11783042B2Access control system and method for isolating mutually distrusting security domainsQUALCOMM INC·Filed 2020·Granted Oct 10, 2023·0 cites·27 claims
- 1842US2021124818A1Hardware-based throttling of user accessQUALCOMM INC·Filed 2019·Application pending·0 cites
- 1941US2021365557A1Policy based access control of subsystem assets via external debug interfaceQUALCOMM INC·Filed 2020·Application pending·0 cites
- 2032US6111435ALow power multiplexer with shared, clocked transistorINTEL CORP·Filed 1999·Granted Aug 29, 2000·2 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →