Inventor · disambiguated record
Marian Alin Petre
Also filed as: PETRE MARIAN · PETRE MARIAN ALIN
9 granted patents·4 pending applications·58 citations·filing 1990–2024
86Inventor score
Top patents by PatentIndex Score
13 records- 0198US11620256B2Systems and methods for improving cache efficiency and utilizationINTEL CORP·Filed 2022·Granted Apr 4, 2023·36 cites·22 claims
- 0297US11531633B2Systems and methods for intelligently implementing concurrent transfers of data within a machine perception and dense algorithm integrated circuitQUADRIC IO INC·Filed 2022·Granted Dec 20, 2022·8 cites·17 claims
- 0393US2025103548A1Systems and methods for improving cache efficiency and utilizationINTEL CORP·Filed 2024·Application pending·0 cites
- 0490US12210477B2Systems and methods for improving cache efficiency and utilizationINTEL CORP·Filed 2020·Granted Jan 28, 2025·2 cites·20 claims
- 0586US11709714B2Thread group scheduling for graphics processingINTEL CORP·Filed 2022·Granted Jul 25, 2023·1 cites·20 claims
- 0673US2024028404A1Thread group scheduling for graphics processingINTEL CORP·Filed 2023·Application pending·0 cites
- 0771US11907146B2Systems and methods for intelligently implementing concurrent transfers of data within a machine perception and dense algorithm integrated circuitQUADRIC IO INC·Filed 2022·Granted Feb 20, 2024·0 cites·20 claims
- 0869US11416411B2Preemptive page fault handlingINTEL CORP·Filed 2019·Granted Aug 16, 2022·1 cites·4 claims
- 0968US2023325087A1Systems and methods for accelerating memory transfers and computation efficiency using a computation-informed partitioning of an on-chip data buffer and implementing computation-aware data transfer operations to the on-chip data bufferQUADRIC IO INC·Filed 2023·Application pending·0 cites
- 1066US11714556B2Systems and methods for accelerating memory transfers and computation efficiency using a computation-informed partitioning of an on-chip data buffer and implementing computation-aware data transfer operations to the on-chip data bufferQUADRIC IO INC·Filed 2022·Granted Aug 1, 2023·0 cites·20 claims
- 1163US11281496B2Thread group scheduling for graphics processingINTEL CORP·Filed 2019·Granted Mar 22, 2022·0 cites·20 claims
- 1243US2020293365A1Transactional page fault handlingINTEL CORP·Filed 2019·Application pending·0 cites
- 1335US5083787ACombinational logic systemPETRE MARIAN·Filed 1990·Granted Jan 28, 1992·10 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →