Inventor · disambiguated record
Madhavan Sainath Rao Pissay
Also filed as: PISSAY MADHAVAN · PISSAY MADHAVAN SAINATH RAO
3 granted patents·3 pending applications·2 citations·filing 2022–2025
53Inventor score
Technology areasG01R
Files withTEXAS INSTRUMENTS INC6
Top patents by PatentIndex Score
6 records- 0190US11946973B1Hold time improved low area flip-flop architectureTEXAS INSTRUMENTS INC·Filed 2022·Granted Apr 2, 2024·2 cites·20 claims
- 0286US2025379562A1Low area and power multi-bit flip-flopTEXAS INSTRUMENTS INC·Filed 2025·Application pending·0 cites
- 0375US12418281B2Low area and power multi-bit flip-flopTEXAS INSTRUMENTS INC·Filed 2024·Granted Sep 16, 2025·0 cites·20 claims
- 0475US2024210472A1Hold time improved low area flip-flop architectureTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 0575US2025027995A1Clock gating circuits and methods for dual-edge-triggered applicationsTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 0671US12146912B1Clock gating circuits and methods for dual-edge-triggered applicationsTEXAS INSTRUMENTS INC·Filed 2023·Granted Nov 19, 2024·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →