Inventor · disambiguated record
Manoj B. Roge
Also filed as: ROGE MANOJ · ROGE MANOJ B
10 granted patents·396 citations·filing 2001–2009
92Inventor score
Top patents by PatentIndex Score
10 records- 0196US7593273B2Read-leveling implementations for DDR3 applications on an FPGAALTERA CORP·Filed 2007·Granted Sep 22, 2009·44 cites·22 claims
- 0296US7590008B1PVT compensated auto-calibration scheme for DDR3ALTERA CORP·Filed 2007·Granted Sep 15, 2009·58 cites·25 claims
- 0395US7983094B1PVT compensated auto-calibration scheme for DDR3ALTERA CORP·Filed 2009·Granted Jul 19, 2011·49 cites·20 claims
- 0490US6480406B1Content addressable memory cellCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted Nov 12, 2002·64 cites·14 claims
- 0588US7928770B1I/O block for high performance memory interfacesALTERA CORP·Filed 2007·Granted Apr 19, 2011·22 cites·21 claims
- 0687US6721202B1Bit encoded ternary content addressable memory cellCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted Apr 13, 2004·44 cites·19 claims
- 0787US6384621B1Programmable transmission line impedance matching circuitCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted May 7, 2002·57 cites·20 claims
- 0885US6791898B1Memory device providing asynchronous and synchronous data transferCYPRESS SEMICONDUCTOR CORP·Filed 2002·Granted Sep 14, 2004·43 cites·18 claims
- 0974US7660167B1Memory device and method for fast cross row data accessCYPRESS SEMICONDUCTOR CORP·Filed 2006·Granted Feb 9, 2010·9 cites·17 claims
- 1072US7990786B2Read-leveling implementations for DDR3 applications on an FPGAALTERA CORP·Filed 2009·Granted Aug 2, 2011·6 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →