Inventor · disambiguated record
Manish Trivedi
Also filed as: TRIVEDI MANISH
7 granted patents·5 pending applications·29 citations·filing 2012–2024
79Inventor score
Top patents by PatentIndex Score
12 records- 0185US8730750B1Memory device with control circuitry for generating a reset signal in read and write modes of operationLSI CORP·Filed 2012·Granted May 20, 2014·11 cites·22 claims
- 0281US9583209B1High density memory architectureADVANCED RISC MACH LTD·Filed 2015·Granted Feb 28, 2017·9 cites·15 claims
- 0371US9384790B2Memory device with separately controlled sense amplifiersTRIVEDI MANISH·Filed 2012·Granted Jul 5, 2016·6 cites·21 claims
- 0468US9438212B2Concurrent true and complement signal generationLSI CORP·Filed 2012·Granted Sep 6, 2016·3 cites·20 claims
- 0552US2025078915A1Low power read circuit for multi-bank memoryMEDIATEK SINGAPORE PTE LTD·Filed 2024·Application pending·0 cites
- 0639US10580479B2Self-time scheme for optimizing performance and power in dual rail power supplies memoriesMEDIATEK SINGAPORE PTE LTD·Filed 2018·Granted Mar 3, 2020·0 cites·20 claims
- 0739US10319432B2Circuits for pulse-width control in memory devices and related methodsMEDIATEK SINGAPORE PTE LTD·Filed 2017·Granted Jun 11, 2019·0 cites·20 claims
- 0836US2024069793A1Efficient write operation for sramMEDIATEK SINGAPORE PTE LTD·Filed 2023·Application pending·0 cites
- 0934US2014152345A1Sense-amplifier latch having single data inputLSI CORP·Filed 2012·Application pending·0 cites
- 1034US2014112062A1Method and system for an adaptive negative-boost write assist circuit for memory architecturesLSI CORP·Filed 2012·Application pending·0 cites
- 1128US2014003160A1High-Speed Sensing Scheme for MemoryTRIVEDI MANISH·Filed 2012·Application pending·0 cites
- 1221US9478278B1Read-write contention circuitryADVANCED RISC MACH LTD·Filed 2015·Granted Oct 25, 2016·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →