Inventor · disambiguated record
Mam-Tsung Wang
Also filed as: WANG MAM TSUNG
31 granted patents·1 pending application·1,331 citations·filing 1997–2020
98Inventor score
Top patents by PatentIndex Score
32 records- 0196US6204529B18 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gateFiled 1999·Granted Mar 20, 2001·324 cites·6 claims
- 0295US6040993AMethod for programming an analog/multi-level flash EEPROMMACRONIX INT CO LTD·Filed 1998·Granted Mar 21, 2000·142 cites·33 claims
- 0392US6215697B1Multi-level memory cell device and method for self-converged programmingMACRONIX INT CO LTD·Filed 1999·Granted Apr 10, 2001·118 cites·25 claims
- 0491US6175519B1Virtual ground EPROM structureMACRONIX INT CO LTD·Filed 1999·Granted Jan 16, 2001·82 cites·20 claims
- 0589US5959892AApparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cellsMACRONIX INT CO LTD·Filed 1997·Granted Sep 28, 1999·88 cites·25 claims
- 0684US5912845AMethod and circuit for substrate current induced hot e- injection (SCIHE) approach for VT convergence at low VCC voltageMACRONIX INT CO LTD·Filed 1997·Granted Jun 15, 1999·49 cites·13 claims
- 0784US5895241AMethod for fabricating a cell structure for mask ROMFiled 1997·Granted Apr 20, 1999·43 cites·6 claims
- 0882US6130452AVirtual ground flash cell with asymmetrically placed source and drain and method of fabricationMACRONIX INT CO LTD·Filed 1998·Granted Oct 10, 2000·45 cites·10 claims
- 0982US5837584AVirtual ground flash cell with asymmetrically placed source and drain and method of fabricationMACRONIX INT CO LTD·Filed 1997·Granted Nov 17, 1998·46 cites·6 claims
- 1078US6140682ASelf protected stacked NMOS with non-silicided region to protect mixed-voltage I/O pad from ESD damageMACRONIX INT CO LTD·Filed 1999·Granted Oct 31, 2000·46 cites·17 claims
- 1178US6031766AMethod and circuit for substrate current induced hot e-injection (SCIHE) approach for VT convergence at low Vcc voltageMACRONIX INT CO LTD·Filed 1999·Granted Feb 29, 2000·34 cites·43 claims
- 1276US6614687B2Current source component with process tracking characteristics for compact programmed Vt distribution of flash EPROMMACRONIX INT CO LTD·Filed 2001·Granted Sep 2, 2003·24 cites·29 claims
- 1376US6055190ADevice and method for suppressing bit line column leakage during erase verification of a memory cellMACRONIX INT CO LTD·Filed 1999·Granted Apr 25, 2000·42 cites·20 claims
- 1475US5912844AMethod for flash EEPROM data writingMACRONIX INT CO LTD·Filed 1998·Granted Jun 15, 1999·37 cites·20 claims
- 1574US5963808AMethod of forming an asymmetric bird's beak cell for a flash EEPROMMACRONIX INT CO LTD·Filed 1997·Granted Oct 5, 1999·36 cites·4 claims
- 1668US6432782B18 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gateMACRONIX INT CO LTD·Filed 2001·Granted Aug 13, 2002·13 cites·6 claims
- 1768US6166955AApparatus and method for programming of flash EPROM memoryMACRONIX INT CO LTD·Filed 1999·Granted Dec 26, 2000·28 cites·40 claims
- 1866US6455898B1Electrostatic discharge input protection for reducing input resistanceMACRONIX INT CO LTD·Filed 1999·Granted Sep 24, 2002·25 cites·11 claims
- 1966US6121092ASilicide blocking process to form non-silicided regions on MOS devicesMACRONIX INT CO LTD·Filed 1999·Granted Sep 19, 2000·28 cites·26 claims
- 2058US6397377B1Method of performing optical proximity corrections of a photo mask pattern by using a computerMACRONIX INT CO LTD·Filed 1999·Granted May 28, 2002·20 cites·10 claims
- 2156US11322542B2Light-emitting diode (LED) assembly and method of manufacturing an LED cell of the sameHARVATEK CORP·Filed 2020·Granted May 3, 2022·0 cites·14 claims
- 2255US11658257B2Light source assembly, optical sensor assembly, and method of manufacturing a cell of the sameHARVATEK CORP·Filed 2020·Granted May 23, 2023·0 cites·16 claims
- 2354US6181604B1Method for fast programming of EPROMS and multi-level flash EPROMSMACRONIX INT CO LTD·Filed 1999·Granted Jan 30, 2001·14 cites·24 claims
- 2451US5828113ADouble density MROM array structureMACRONIX INT CO LTD·Filed 1997·Granted Oct 27, 1998·12 cites·15 claims
- 2544US6269017B1Multi level mask ROM with single current pathMACRONIX INT CO LTD·Filed 1999·Granted Jul 31, 2001·9 cites·14 claims
- 2644US6259140B1Silicide blocking process to form non-silicided regions on MOS devicesMACRONIX INT CO LTD·Filed 1999·Granted Jul 10, 2001·10 cites·14 claims
- 2743US6028790AMethod and device for programming a non-volatile memory cell by controlling source current pulldown rateMACRONIX INT CO LTD·Filed 1999·Granted Feb 22, 2000·8 cites·13 claims
- 2834US6046482ACell structure for mask ROMMACRONIX INT CO LTD·Filed 1997·Granted Apr 4, 2000·2 cites·7 claims
- 2932US5893738AMethod for forming double density MROM array structureMACRONIX INT CO LTD·Filed 1997·Granted Apr 13, 1999·2 cites·9 claims
- 3031US6166943AMethod of forming a binary code of a ROMMACRONIX INT CO LTD·Filed 1999·Granted Dec 26, 2000·3 cites·10 claims
- 3128US2002034854A1Process and integrated circuit for a multilevel memory cell with an asymmetric drainFiled 2001·Application pending·0 cites
- 3227US6525361B1Process and integrated circuit for a multilevel memory cell with an asymmetric drainMACRONIX INT CO LTD·Filed 1999·Granted Feb 25, 2003·1 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →