Inventor · disambiguated record

Meng-Fang Hsu

Also filed as: HSU MENG-FANG

9 granted patents·1 pending application·46 citations·filing 2013–2024

85Inventor score

Technology areasH10W H10P H01L H10D

Files withTAIWAN SEMICONDUCTOR MFG CO LTD10

Top patents by PatentIndex Score

10 records

0196US10276676B1Methods of forming metal gate isolationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 30, 2019·25 cites·20 claims
0292US10043712B1Semiconductor structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 7, 2018·11 cites·20 claims
0384US10770559B2Gate structure and methods of forming metal gate isolationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Sep 8, 2020·3 cites·20 claims
0482US9911805B2Silicon recess etch and epitaxial deposit for shallow trench isolation (STI)TAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Mar 6, 2018·3 cites·20 claims
0579US9129823B2Silicon recess ETCH and epitaxial deposit for shallow trench isolation (STI)TAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Sep 8, 2015·4 cites·20 claims
0670US11869800B2Method for fabricating a semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jan 9, 2024·0 cites·20 claims
0761US10692750B2Method for fabricating a semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jun 23, 2020·0 cites·20 claims
0860US2025294909A1Via structure for multi-stacked chipsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
0955US9972524B2Method for fabricating a semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted May 15, 2018·0 cites·21 claims
1051US9502533B2Silicon recess etch and epitaxial deposit for shallow trench isolation (STI)TAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 22, 2016·0 cites·20 claims

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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →