Inventor · disambiguated record
Mei Sheng Zhou
Also filed as: ZHOU MEI S · ZHOU MEI SHENG
144 granted patents·21 pending applications·5,757 citations·filing 1996–2012
99Inventor score
Files withCHARTERED SEMICONDUCTOR MFG140TAIWAN SEMICONDUCTOR MFG8GLOBALFOUNDRIES SG PTE LTD4LIU JINPING4CHEW HAN-GUAN1
Top patents by PatentIndex Score
165 records- 0199US6284657B1Non-metallic barrier formation for copper damascene type interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Sep 4, 2001·190 cites·20 claims
- 0298US6376353B1Aluminum and copper bimetallic bond pad scheme for copper damascene interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 23, 2002·319 cites·52 claims
- 0398US6348407B1Method to improve adhesion of organic dielectrics in dual damascene interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Feb 19, 2002·250 cites·34 claims
- 0497US6475908B1Dual metal gate process: metals and their silicidesCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Nov 5, 2002·128 cites·42 claims
- 0597US6287979B1Method for forming an air gap as low dielectric constant material using buckminsterfullerene as a porogen in an air bridge or a sacrificial layerCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Sep 11, 2001·140 cites·29 claims
- 0696US6358842B1Method to form damascene interconnects with sidewall passivation to protect organic dielectricsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Mar 19, 2002·141 cites·30 claims
- 0796US6352917B1Reversed damascene process for multiple level metal interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Mar 5, 2002·140 cites·34 claims
- 0896US6265321B1Air bridge process for forming air gapsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jul 24, 2001·148 cites·37 claims
- 0995US6458695B1Methods to form dual metal gates by incorporating metals and their conductive oxidesCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Oct 1, 2002·83 cites·30 claims
- 1095US6040243AMethod to form copper damascene interconnects using a reverse barrier metal scheme to eliminate copper diffusionCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Mar 21, 2000·250 cites·20 claims
- 1194US6683002B1Method to create a copper diffusion deterrent interfaceCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jan 27, 2004·71 cites·7 claims
- 1294US6436824B1Low dielectric constant materials for copper damasceneCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Aug 20, 2002·175 cites·28 claims
- 1394US6424044B1Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallizationCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jul 23, 2002·99 cites·13 claims
- 1494US5801083AUse of polymer spacers for the fabrication of shallow trench isolation regions with rounded top cornersCHARTERED SEMICONDUCTOR MFG·Filed 1997·Granted Sep 1, 1998·251 cites·16 claims
- 1593US6632712B1Method of fabricating variable length vertical transistorsCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Oct 14, 2003·89 cites·31 claims
- 1692US6486080B2Method to form zirconium oxide and hafnium oxide for high dielectric constant materialsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Nov 26, 2002·65 cites·20 claims
- 1792US6372636B1Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damasceneCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 16, 2002·70 cites·36 claims
- 1891US6750519B2Dual metal gate process: metals and their silicidesCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jun 15, 2004·45 cites·8 claims
- 1991US6352921B1Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallizationCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Mar 5, 2002·64 cites·20 claims
- 2090US6468851B1Method of fabricating CMOS device with dual gate electrodeCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Oct 22, 2002·55 cites·39 claims
- 2190US6380087B1CMP process utilizing dummy plugs in damascene processCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 30, 2002·89 cites·29 claims
- 2290US6350675B1Integration of silicon-rich material in the self-aligned via approach of dual damascene interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Feb 26, 2002·55 cites·44 claims
- 2390US6184138B1Method to create a controllable and reproducible dual copper damascene structureCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Feb 6, 2001·121 cites·13 claims
- 2490US6121130ALaser curing of spin-on dielectric thin filmsCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Sep 19, 2000·118 cites·20 claims
- 2590US6114243AMethod to avoid copper contamination on the sidewall of a via or a dual damascene structureCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Sep 5, 2000·123 cites·28 claims
- 2690US5863307AMethod and slurry composition for chemical-mechanical polish (CMP) planarizing of copper containing conductor layersCHARTERED SEMICONDUCTOR MFG·Filed 1998·Granted Jan 26, 1999·91 cites·8 claims
- 2789US6303447B1Method for forming an extended metal gate using a damascene processCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Oct 16, 2001·51 cites·21 claims
- 2889US6274499B1Method to avoid copper contamination during copper etching and CMPCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Aug 14, 2001·98 cites·30 claims
- 2989US6165891ADamascene structure with reduced capacitance using a carbon nitride, boron nitride, or boron carbon nitride passivation layer, etch stop layer, and/or cap layerCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Dec 26, 2000·87 cites·40 claims
- 3089US5780358AMethod for chemical-mechanical polish (CMP) planarizing of cooper containing conductor layersCHARTERED SEMICONDUCTOR MFG·Filed 1996·Granted Jul 14, 1998·132 cites·12 claims
- 3188US6489233B2Non-metallic barrier formations for copper damascene type interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Dec 3, 2002·36 cites·16 claims
- 3287US6566260B2Non-metallic barrier formations for copper damascene type interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted May 20, 2003·32 cites·19 claims
- 3387US6261942B1Dual metal-oxide layer as air bridgeCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jul 17, 2001·42 cites·51 claims
- 3487US6225221B1Method to deposit a copper seed layer for dual damascene interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted May 1, 2001·53 cites·20 claims
- 3586US7879732B2Thin film etching method and semiconductor device fabrication using sameCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Feb 1, 2011·8 cites·24 claims
- 3686US6417088B1Method of application of displacement reaction to form a conductive cap layer for flip-chip, COB, and micro metal bondingCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jul 9, 2002·44 cites·22 claims
- 3786US6378759B1Method of application of conductive cap-layer in flip-chip, COB, and micro metal bondingCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 30, 2002·37 cites·17 claims
- 3885US6690091B1Damascene structure with reduced capacitance using a boron carbon nitride passivation layer, etch stop layer, and/or cap layerCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Feb 10, 2004·29 cites·7 claims
- 3985US6331479B1Method to prevent degradation of low dielectric constant material in copper damascene interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Dec 18, 2001·84 cites·23 claims
- 4084US7005716B2Dual metal gate process: metals and their silicidesCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Feb 28, 2006·25 cites·4 claims
- 4184US6720204B2Method of using hydrogen plasma to pre-clean copper surfaces during Cu/Cu or Cu/metal bondingCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Apr 13, 2004·38 cites·18 claims
- 4284US6465888B2Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damasceneCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Oct 15, 2002·33 cites·7 claims
- 4383US7902066B2Damascene contact structure for integrated circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Mar 8, 2011·9 cites·20 claims
- 4483US6677652B2Methods to form dual metal gates by incorporating metals and their conductive oxidesCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jan 13, 2004·24 cites·4 claims
- 4583US6429122B2Non metallic barrier formations for copper damascene type interconnectsCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Aug 6, 2002·25 cites·26 claims
- 4682US6251786B1Method to create a copper dual damascene structure with less dishing and erosionCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Jun 26, 2001·65 cites·20 claims
- 4781US8012839B2Method for fabricating a semiconductor device having an epitaxial channel and transistor having sameGLOBALFOUNDRIES SG PTE LTD·Filed 2008·Granted Sep 6, 2011·8 cites·7 claims
- 4881US7745320B2Method for reducing silicide defects in integrated circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2008·Granted Jun 29, 2010·7 cites·21 claims
- 4981US5866448AProcedure for forming a lightly-doped-drain structure using polymer layerCHARTERED SEMICONDUCTOR MFG·Filed 1997·Granted Feb 2, 1999·58 cites·29 claims
- 5080US8058123B2Integrated circuit and method of fabrication thereofLIU JINPING·Filed 2007·Granted Nov 15, 2011·8 cites·24 claims
Showing the top 50 of 165 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →