Inventor · disambiguated record
Michael Angerbauer
Also filed as: ANGERBAUER MICHAEL · ANGERBAUER MICHAEL-ARMIN
6 granted patents·6 pending applications·96 citations·filing 2005–2023
84Inventor score
Files withQIMONDA AG4INFINEON TECHNOLOGIES AG3ANGERBAUER MICHAEL2HOENIGSCHMID HEINZ2STIHL AG & CO KG ANDREAS1
Top patents by PatentIndex Score
12 records- 0192US7869253B2Method of determining a memory state of a resistive memory cell and device measuring the memory state of a resistive memory cellQIMONDA AG·Filed 2006·Granted Jan 11, 2011·38 cites·14 claims
- 0286US7420841B2Memory device and method for transforming between non-power-of-2 levels of multilevel memory cells and 2-level data bitsQIMONDA AG·Filed 2006·Granted Sep 2, 2008·21 cites·19 claims
- 0384US7706201B2Integrated circuit with Resistivity changing memory cells and methods of operating the sameQIMONDA AG·Filed 2007·Granted Apr 27, 2010·16 cites·24 claims
- 0473US7342819B2Methods for generating a reference voltage and for reading a memory cell and circuit configurations implementing the methodsINFINEON TECHNOLOGIES AG·Filed 2006·Granted Mar 11, 2008·9 cites·26 claims
- 0567US7599209B2Memory circuit including a resistive memory element and method for operating such a memory circuitINFINEON TECHNOLOGIES AG·Filed 2005·Granted Oct 6, 2009·7 cites·17 claims
- 0661US7518902B2Resistive memory device and method for writing to a resistive memory cell in a resistive memory deviceINFINEON TECHNOLOGIES AG·Filed 2005·Granted Apr 14, 2009·5 cites·23 claims
- 0752US2024200620A1Handheld work apparatus with a brake unitSTIHL AG & CO KG ANDREAS·Filed 2023·Application pending·0 cites
- 0835US2009213643A1Integrated Circuit and Method of Improved Determining a Memory State of a Memory CellANGERBAUER MICHAEL·Filed 2008·Application pending·0 cites
- 0933US2008205179A1Integrated circuit having a memory arrayQIMONDA AG·Filed 2007·Application pending·0 cites
- 1032US2008273369A1Integrated Circuit, Memory Module, Method of Operating an Integrated Circuit, and Computing SystemANGERBAUER MICHAEL·Filed 2007·Application pending·0 cites
- 1127US2008043513A1Intergrated circuit having memory with resistive memory cellsHOENIGSCHMID HEINZ·Filed 2006·Application pending·0 cites
- 1225US2007195580A1Memory circuit having a resistive memory cell and method for operating such a memory circuitHOENIGSCHMID HEINZ·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →