Inventor · disambiguated record
Michael Cornaby
Also filed as: CORNABY MICHAEL · CORNABY MICHAEL P
23 granted patents·5 pending applications·98 citations·filing 2000–2024
94Inventor score
Technology areasG06F
Top patents by PatentIndex Score
28 records- 0196US7949887B2Independent power control of processing coresINTEL CORP·Filed 2006·Granted May 24, 2011·43 cites·29 claims
- 0291US8069358B2Independent power control of processing coresGUNTHER STEPHEN H·Filed 2009·Granted Nov 29, 2011·14 cites·6 claims
- 0378US7500049B2Providing a backing store in user-level memoryINTEL CORP·Filed 2005·Granted Mar 3, 2009·8 cites·26 claims
- 0477US9021279B2Independent power control of processing coresGUNTHER STEPHEN H·Filed 2011·Granted Apr 28, 2015·2 cites·18 claims
- 0577US8522044B2Mechanism to handle events in a machine with isolated executionMCKEEN FRANCIS X·Filed 2010·Granted Aug 27, 2013·3 cites·7 claims
- 0675US7404065B2Flow optimization and prediction for VSSE memory operationsINTEL CORP·Filed 2005·Granted Jul 22, 2008·7 cites·23 claims
- 0772US8239659B2Vector completion mask handlingJOURDAN STEPHAN·Filed 2006·Granted Aug 7, 2012·6 cites·22 claims
- 0867US10635155B2Independent power control of processing coresINTEL CORP·Filed 2018·Granted Apr 28, 2020·0 cites·20 claims
- 0967US10613610B2Independent power control of processing coresINTEL CORP·Filed 2018·Granted Apr 7, 2020·0 cites·20 claims
- 1067US10534419B2Independent power control of processing coresINTEL CORP·Filed 2018·Granted Jan 14, 2020·0 cites·20 claims
- 1167US10095300B2Independent power control of processing coresINTEL CORP·Filed 2017·Granted Oct 9, 2018·0 cites·20 claims
- 1264US8949635B2Integrated circuit performance improvement across a range of operating conditions and physical constraintsGUNTHER STEPHEN H·Filed 2007·Granted Feb 3, 2015·3 cites·13 claims
- 1364US7793111B1Mechanism to handle events in a machine with isolated executionINTEL CORP·Filed 2000·Granted Sep 7, 2010·7 cites·18 claims
- 1462US12511127B2Dynamic reconfiguration of a multi-core processor to a unified coreNVIDIA CORP·Filed 2024·Granted Dec 30, 2025·0 cites·21 claims
- 1561US9841803B2Independent power control of processing coresINTEL CORP·Filed 2015·Granted Dec 12, 2017·0 cites·19 claims
- 1658US8996899B2Independent power control of processing coresGUNTHER STEPHEN H·Filed 2012·Granted Mar 31, 2015·0 cites·20 claims
- 1758US8856568B2Independent power control of processing coresGUNTHER STEPHEN H·Filed 2012·Granted Oct 7, 2014·0 cites·29 claims
- 1855US9037885B2Independent power control of processing coresGUNTHER STEPHEN H·Filed 2010·Granted May 19, 2015·0 cites·20 claims
- 1951US8671275B2Mechanism to handle events in a machine with isolated executionMCKEEN FRANCIS X·Filed 2010·Granted Mar 11, 2014·0 cites·9 claims
- 2051US8458464B2Mechanism to handle events in a machine with isolated executionMCKEEN FRANCIS X·Filed 2010·Granted Jun 4, 2013·0 cites·4 claims
- 2151US2025265224A1Dynamic reconfiguration of a unified core processor to a multi-core processorNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2249US8510536B2Vector completion mask handlingJOURDAN STEPHAN·Filed 2012·Granted Aug 13, 2013·0 cites·17 claims
- 2349US7231511B2Microinstruction pointer stack including speculative pointers for out-of-order executionINTEL CORP·Filed 2001·Granted Jun 12, 2007·5 cites·38 claims
- 2448US2005283660A1Mechanism to handle events in a machine with isolated executionMCKEEN FRANCIS X·Filed 2005·Application pending·0 cites
- 2544US6857062B2Broadcast state renaming in a microprocessorINTEL CORP·Filed 2001·Granted Feb 15, 2005·0 cites·30 claims
- 2644US2005071518A1Flag value renamingINTEL CORP·Filed 2003·Application pending·0 cites
- 2742US2014082238A1Method and system for implementing a control register access busAHMAD SAGHEER·Filed 2012·Application pending·0 cites
- 2840US2002129229A1Microinstruction sequencer stackFiled 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →