Inventor · disambiguated record
Ming H. Ding
Also filed as: DING MING H · DING MING HUI
11 granted patents·122 citations·filing 2003–2021
89Inventor score
Files withLATTICE SEMICONDUCTOR CORP11
Top patents by PatentIndex Score
11 records- 0196US7385417B1Dual slice architectures for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2006·Granted Jun 10, 2008·48 cites·31 claims
- 0291US6975137B1Programmable logic devices with integrated standard-cell logic blocksLATTICE SEMICONDUCTOR CORP·Filed 2005·Granted Dec 13, 2005·20 cites·18 claims
- 0389US6870395B2Programmable logic devices with integrated standard-cell logic blocksLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Mar 22, 2005·36 cites·27 claims
- 0481US11847471B2Fast boot systems and methods for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2021·Granted Dec 19, 2023·1 cites·20 claims
- 0580US7592834B1Logic block control architectures for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2008·Granted Sep 22, 2009·7 cites·16 claims
- 0673US11132207B2Fast boot systems and methods for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2018·Granted Sep 28, 2021·2 cites·20 claims
- 0765US7397276B1Logic block control architectures for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2006·Granted Jul 8, 2008·3 cites·23 claims
- 0860US7675321B1Dual-slice architectures for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2009·Granted Mar 9, 2010·2 cites·18 claims
- 0954US7696784B1Programmable logic device with multiple slice typesLATTICE SEMICONDUCTOR CORP·Filed 2008·Granted Apr 13, 2010·1 cites·6 claims
- 1053US7605606B1Area efficient routing architectures for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2006·Granted Oct 20, 2009·2 cites·20 claims
- 1139US7378872B1Programmable logic device architecture with multiple slice typesLATTICE SEMICONDUCTOR CORP·Filed 2006·Granted May 27, 2008·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →