Inventor · disambiguated record
Michael Fitton
Also filed as: FITTON MICHAEL · FITTON MICHAEL P · FITTON MICHAEL PHILIP
31 granted patents·11 pending applications·204 citations·filing 2002–2024
97Inventor score
Top patents by PatentIndex Score
42 records- 0196US10790830B1Fused memory and arithmetic circuitACHRONIX SEMICONDUCTOR CORP·Filed 2019·Granted Sep 29, 2020·19 cites·19 claims
- 0295US11650792B2Multiple mode arithmetic circuitACHRONIX SEMICONDUCTOR CORP·Filed 2022·Granted May 16, 2023·4 cites·20 claims
- 0394US12014150B2Multiple mode arithmetic circuitACHRONIX SEMICONDUCTOR CORP·Filed 2023·Granted Jun 18, 2024·2 cites·20 claims
- 0492US11288220B2Cascade communications between FPGA tilesACHRONIX SEMICONDUCTOR CORP·Filed 2019·Granted Mar 29, 2022·7 cites·20 claims
- 0590US11256476B2Multiple mode arithmetic circuitACHRONIX SEMICONDUCTOR CORP·Filed 2019·Granted Feb 22, 2022·5 cites·20 claims
- 0690US7761050B2Communication network for indoor environmentTOSHIBA KK·Filed 2007·Granted Jul 20, 2010·30 cites·14 claims
- 0788US7716454B2Method and apparatus for matrix decomposition in programmable logic devicesALTERA CORP·Filed 2006·Granted May 11, 2010·13 cites·8 claims
- 0887US12034446B2Fused memory and arithmetic circuitACHRONIX SEMICONDUCTOR CORP·Filed 2020·Granted Jul 9, 2024·2 cites·20 claims
- 0987US7979673B2Method and apparatus for matrix decompositions in programmable logic devicesALTERA CORP·Filed 2010·Granted Jul 12, 2011·7 cites·15 claims
- 1086US11734216B2Cascade communications between FPGA tilesACHRONIX SEMICONDUCTOR CORP·Filed 2022·Granted Aug 22, 2023·1 cites·20 claims
- 1182US12468506B2Multiple mode arithmetic circuitACHRONIX SEMICONDUCTOR CORP·Filed 2024·Granted Nov 11, 2025·0 cites·18 claims
- 1282US8555031B2Methods and apparatus for matrix decompositions in programmable logic devicesALTERA CORP·Filed 2013·Granted Oct 8, 2013·4 cites·20 claims
- 1380US7295597B2Receiver processing systemsTOSHIBA KK·Filed 2003·Granted Nov 13, 2007·27 cites·18 claims
- 1478US9000802B2Systems and methods for interfacing between hard logic and soft logic in a hybrid integrated deviceALTERA CORP·Filed 2014·Granted Apr 7, 2015·4 cites·18 claims
- 1578US8629691B2Systems and methods for interfacing between hard logic and soft logic in a hybrid integrated deviceFITTON MICHAEL·Filed 2012·Granted Jan 14, 2014·5 cites·19 claims
- 1677US12141088B2Cascade communications between FPGA tilesACHRONIX SEMICONDUCTOR CORP·Filed 2023·Granted Nov 12, 2024·0 cites·20 claims
- 1777US8307021B1Hardware architecture and scheduling for high performance solution to cholesky decompositionDHANOA KULWINDER·Filed 2008·Granted Nov 6, 2012·9 cites·25 claims
- 1875US8428179B1Apparatus and method for crest factor reductionXU LEI·Filed 2010·Granted Apr 23, 2013·4 cites·28 claims
- 1973US8433322B1Processor for a base station control unitFITTON MICHAEL·Filed 2011·Granted Apr 30, 2013·2 cites·32 claims
- 2072US7346369B2Mode monitoring and identification through distributed radioTOSHIBA KK·Filed 2002·Granted Mar 18, 2008·19 cites·4 claims
- 2171US8121203B1Ranging code detectionFITTON MICHAEL·Filed 2006·Granted Feb 21, 2012·4 cites·15 claims
- 2271US7386032B2Receiver processing systemsTOSHIBA KK·Filed 2003·Granted Jun 10, 2008·16 cites·21 claims
- 2368US8359458B2Methods and apparatus for matrix decompositions in programmable logic devicesALTERA CORP·Filed 2011·Granted Jan 22, 2013·1 cites·17 claims
- 2467US7961669B1Processor for a base station control unitALTERA CORP·Filed 2007·Granted Jun 14, 2011·2 cites·33 claims
- 2561US7330505B2Equaliser apparatus and methodsTOSHIBA KK·Filed 2003·Granted Feb 12, 2008·11 cites·15 claims
- 2657US9483233B2Methods and apparatus for matrix decompositions in programmable logic devicesALTERA CORP·Filed 2013·Granted Nov 1, 2016·0 cites·20 claims
- 2754US8897784B1Processor for a base station control unitALTERA CORP·Filed 2013·Granted Nov 25, 2014·0 cites·19 claims
- 2852US7342954B2Adaptive modulation for wireless networksTOSHIBA KK·Filed 2003·Granted Mar 11, 2008·6 cites·37 claims
- 2951US2008043680A1Receiver processing systemsTOSHIBA KK·Filed 2007·Application pending·0 cites
- 3048US8548078B1Ranging code detectionFITTON MICHAEL·Filed 2012·Granted Oct 1, 2013·0 cites·18 claims
- 3148US8156171B1Digital logic circuitFITTON MICHAEL·Filed 2007·Granted Apr 10, 2012·0 cites·8 claims
- 3248US2008016381A1Reduced power consumption signal processing methods and apparatusTOSHIBA KK·Filed 2007·Application pending·0 cites
- 3345US2004028121A1Receiver processing systemsTOSHIBA KK·Filed 2003·Application pending·0 cites
- 3443US2004153679A1Reduced power consumption signal processing methods and apparatusTOSHIBA KK·Filed 2003·Application pending·0 cites
- 3542US2004229650A1Signal processing apparatus and methodsTOSHIBA KK·Filed 2004·Application pending·0 cites
- 3641US2005152322A1Reconfigurable signal processing moduleTOSHIBA KK·Filed 2004·Application pending·0 cites
- 3740US2004023665A1Methods and apparatus for alternative mode monitoringTOSHIBA KK·Filed 2003·Application pending·0 cites
- 3838US9083139B2Mounting vane for optical element of a laserSTFC SCIENCE & TECHNOLOGY·Filed 2012·Granted Jul 14, 2015·0 cites·32 claims
- 3938US2004229563A1Communication network for indoor environmentTOSHIBA KK·Filed 2004·Application pending·0 cites
- 4038US2004085917A1Channel estimation apparatus and methodsTOSHIBA KK·Filed 2003·Application pending·0 cites
- 4138US2004013168A1Channel management in adaptive hopping schemesTOSHIBA CORP·Filed 2003·Application pending·0 cites
- 4236US2005213529A1Channel estimation in a CDMA receiverTOSHIBA KK·Filed 2005·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Michael Fitton files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →