Inventor · disambiguated record
Michel Isert
Also filed as: ISERT MICHEL
2 granted patents·96 citations·filing 1981–1981
65Inventor score
Technology areasG06F
Files withCII HONEYWELL BULL2
Top patents by PatentIndex Score
2 records- 0181US4426681AProcess and device for managing the conflicts raised by multiple access to same cache memory of a digital data processing system having plural processors, each having a cache memoryCII HONEYWELL BULL·Filed 1981·Granted Jan 17, 1984·84 cites·15 claims
- 0232US4415971AApparatus for managing the data transfers between a memory unit and the different processing units of a digital data processing systemCII HONEYWELL BULL·Filed 1981·Granted Nov 15, 1983·12 cites·4 claims
Join the waitlist — get patent alerts
Get an alert when Michel Isert files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →