Inventor · disambiguated record
Michelle Yejin Kim
Also filed as: KIM MICHELLE YEJIN
6 granted patents·12 pending applications·0 citations·filing 2020–2024
63Inventor score
Technology areasH10W
Files withQUALCOMM INC18
Top patents by PatentIndex Score
18 records- 0161US12500146B2Substrate(s) for an integrated circuit (IC) package employing a metal core for improved electrical shielding and structural strength, and related IC packages and fabrication methodsQUALCOMM INC·Filed 2023·Granted Dec 16, 2025·0 cites·23 claims
- 0258US2025293147A1Package substrate with a reserve capacitorQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0357US2025140700A1Substrate including conductive stud on pad structureQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0457US2025079281A1Package substrate employing film substrate and an outer pre-impregnated (ppg) substrate(s) to support high density bump and wire bond connections, and related hybrid integrated circuit (ic) packages and fabrication methodsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0556US2025096111A1Package comprising a substrate with a passive component blockQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0656US2025079348A1Package comprising a substrate with an embedded passive deviceQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0755US11791320B2Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methodsQUALCOMM INC·Filed 2021·Granted Oct 17, 2023·0 cites·31 claims
- 0855US2025070086A1Package-on-package device including redistribution dieQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0955US2025070034A1Integrated device with embedded interconnect structureQUALCOMM INC·Filed 2023·Application pending·0 cites
- 1054US2024371737A1Package substrate having electronic component mounted in a cavity of a core of the package substrate with a resinQUALCOMM INC·Filed 2023·Application pending·0 cites
- 1153US11527498B2Bump pad structureQUALCOMM INC·Filed 2020·Granted Dec 13, 2022·0 cites·28 claims
- 1253US2024321763A1Package substrate comprising at least two core layersQUALCOMM INC·Filed 2023·Application pending·0 cites
- 1352US12424559B2Package with a substrate comprising embedded escape interconnects and surface escape interconnectsQUALCOMM INC·Filed 2022·Granted Sep 23, 2025·0 cites·23 claims
- 1452US12362269B2Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methodsQUALCOMM INC·Filed 2021·Granted Jul 15, 2025·0 cites·37 claims
- 1552US2024105568A1Package comprising a substrate with interconnectsQUALCOMM INC·Filed 2022·Application pending·0 cites
- 1652US2024079307A1Package comprising a substrate with post interconnects having a profile cross section of a trapezoid shapeQUALCOMM INC·Filed 2022·Application pending·0 cites
- 1749US11676905B2Integrated circuit (IC) package with stacked die wire bond connections, and related methodsQUALCOMM INC·Filed 2021·Granted Jun 13, 2023·0 cites·25 claims
- 1843US2023215849A1PACKAGE SUBSTRATES WITH EMBEDDED DIE-SIDE, FACE-UP DEEP TRENCH CAPACITOR(S) (DTC(s)), AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODSQUALCOMM INC·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →