Inventor · disambiguated record
Michael Kinsner
Also filed as: KINSNER MICHAEL
1 granted patent·9 pending applications·0 citations·filing 2022–2024
7Inventor score
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10 records- 0157US2022197613A1Clock gating and clock scaling based on runtime application task graph informationINTEL CORP·Filed 2022·Application pending·0 cites
- 0253US12493454B2Incremental just-in-time (JIT) performance refinement for programmable logic device offloadALTERA CORP·Filed 2022·Granted Dec 9, 2025·0 cites·19 claims
- 0350US2024020449A1Fast CAD Compilation Through Coarse Macro LoweringINTEL CORP·Filed 2023·Application pending·0 cites
- 0448US2023237230A1Fast fpga compilation from software flows through partial reconfiguration and hardened network-on-chipINTEL CORP·Filed 2023·Application pending·0 cites
- 0548US2023333826A1Fast fpga compilation through bitstream stitchingKINSNER MICHAEL·Filed 2023·Application pending·0 cites
- 0648US2023237231A1Modular Compilation Flows for a Programmable Logic DeviceINTEL CORP·Filed 2023·Application pending·0 cites
- 0747US2024193331A1Techniques For Coarse Grained And Fine Grained Configurations Of Configurable Logic CircuitsALTERA CORP·Filed 2024·Application pending·0 cites
- 0844US2022365813A1Apparatus, Device, Method, and Computer Program for Scheduling an Execution of Compute KernelsPOORNACHANDRAN RAJESH·Filed 2022·Application pending·0 cites
- 0939US2022197615A1Data parallel programming task graph optimization through device telemetryINTEL CORP·Filed 2022·Application pending·0 cites
- 1039US2022197715A1Data parallel programming-based transparent transfer across heterogeneous devicesINTEL CORP·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →