Inventor · disambiguated record
Mitsuyuki Kunieda
Also filed as: KUNIEDA MITSUYUKI
2 granted patents·34 citations·filing 1983–1988
60Inventor score
Top patents by PatentIndex Score
2 records- 0175US4716308AMOS pull-up or pull-down logic circuit having equalized discharge time delays and layout avoiding crossoversTOKYO SHIBAURA ELECTRIC CO·Filed 1983·Granted Dec 29, 1987·29 cites·3 claims
- 0233US4896056ASemiconductor IC including circuit for preventing erroneous operation caused by power source noiseTOSHIBA KK·Filed 1988·Granted Jan 23, 1990·5 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →