Inventor · disambiguated record
Michael Anthony Perez
Also filed as: PEREZ MICHAEL A · PEREZ MICHAEL ANTHONY
21 granted patents·3 pending applications·331 citations·filing 1996–2007
96Inventor score
Top patents by PatentIndex Score
24 records- 0188US6658599B1Method for recovering from a machine check interrupt during runtimeIBM·Filed 2000·Granted Dec 2, 2003·60 cites·36 claims
- 0287US7660925B2Balancing PCI-express bandwidthIBM·Filed 2007·Granted Feb 9, 2010·27 cites·35 claims
- 0384US8270295B2Reassigning virtual lane buffer allocation during initialization to maximize IO performanceKENDALL KRIS M·Filed 2007·Granted Sep 18, 2012·19 cites·9 claims
- 0481US6662318B1Timely error data acquistionIBM·Filed 2000·Granted Dec 9, 2003·33 cites·21 claims
- 0577US7103808B2Apparatus for reporting and isolating errors below a host bridgeIBM·Filed 2003·Granted Sep 5, 2006·24 cites·24 claims
- 0675US7107495B2Method, system, and product for improving isolation of input/output errors in logically partitioned data processing systemsIBM·Filed 2003·Granted Sep 12, 2006·21 cites·36 claims
- 0770US6704823B1Method and apparatus for dynamic allocation of interrupt lines through interrupt sharingIBM·Filed 2000·Granted Mar 9, 2004·17 cites·25 claims
- 0868US7653773B2Dynamically balancing bus bandwidthIBM·Filed 2007·Granted Jan 26, 2010·4 cites·25 claims
- 0968US6976191B2Method and apparatus for analyzing hardware errors in a logical partitioned data processing systemIBM·Filed 2002·Granted Dec 13, 2005·13 cites·34 claims
- 1068US6898686B1Memory map adjustment to support the need of adapters with large memory requirementsIBM·Filed 2000·Granted May 24, 2005·14 cites·26 claims
- 1167US7146515B2System and method for selectively executing a reboot request after a reset to power on state for a particular partition in a logically partitioned systemIBM·Filed 2002·Granted Dec 5, 2006·14 cites·7 claims
- 1266US7757017B2Adjusting direction of data flow between I/O bridges and I/O hubs based on real time traffic levelsIBM·Filed 2007·Granted Jul 13, 2010·4 cites·15 claims
- 1366US6665753B1Performance enhancement implementation through buffer management/bridge settingsIBM·Filed 2000·Granted Dec 16, 2003·12 cites·29 claims
- 1465US6834363B2Method for prioritizing bus errorsIBM·Filed 2001·Granted Dec 21, 2004·11 cites·40 claims
- 1565US6820161B1Mechanism for allowing PCI-PCI bridges to cache data without any coherency side effectsIBM·Filed 2000·Granted Nov 16, 2004·11 cites·27 claims
- 1664US8654634B2Dynamically reassigning virtual lane resourcesKENDALL KRIS M·Filed 2007·Granted Feb 18, 2014·4 cites·12 claims
- 1757US6697940B1Mechanism to disable the gathering of time consuming unnecessary information at boottimeIBM·Filed 2000·Granted Feb 24, 2004·6 cites·21 claims
- 1854US6473814B1System for optimally tuning a burst length by setting a maximum burst length based on a latency timer value and adjusting the maximum burst length based on a cache line sizeIBM·Filed 1999·Granted Oct 29, 2002·31 cites·20 claims
- 1952US6898644B1Method of programming I/O adapter settings for optimal performanceIBM·Filed 2000·Granted May 24, 2005·2 cites·3 claims
- 2050US6662320B1Method and apparatus for inhibiting an adapter bus error signal following a reset operationIBM·Filed 2000·Granted Dec 9, 2003·1 cites·42 claims
- 2142US2003191978A1Multiple fault location in a series of devicesIBM·Filed 2002·Application pending·0 cites
- 2241US2008301350A1Method for Reassigning Root Complex Resources in a Multi-Root PCI-Express SystemLARSON CHAD J·Filed 2007·Application pending·0 cites
- 2339US2002124211A1PCI error determination using error signatures or vectorsIBM·Filed 2001·Application pending·0 cites
- 2428US6519555B1Apparatus and method of allowing PCI v1.0 devices to work in PCI v2.0 compliant systemIBM·Filed 1996·Granted Feb 11, 2003·3 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →