Inventor · disambiguated record
Michael A. Simone
Also filed as: SIMONE MICHAEL A
4 granted patents·145 citations·filing 1995–1995
81Inventor score
Technology areasG06F
Top patents by PatentIndex Score
4 records- 0181US5651124AProcessor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise stateHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Jul 22, 1997·65 cites·24 claims
- 0256US5745726AMethod and apparatus for selecting the oldest queued instructions without data dependenciesFUJITSU LTD·Filed 1995·Granted Apr 28, 1998·34 cites·5 claims
- 0352US5784586AAddressing method for executing load instructions out of order with respect to store instructionsFUJITSU LTD·Filed 1995·Granted Jul 21, 1998·28 cites·5 claims
- 0441US5638312AMethod and apparatus for generating a zero bit status flag in a microprocessorHAL COMPUTER SYSTEMS INC·Filed 1995·Granted Jun 10, 1997·18 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →