Inventor · disambiguated record
Michael T. Welch
Also filed as: WELCH MICHAEL · WELCH MICHAEL T
10 granted patents·434 citations·filing 1986–2006
92Inventor score
Top patents by PatentIndex Score
10 records- 0188US4753709AMethod for etching contact vias in a semiconductor deviceTEXAS INSTRUMENTS INC·Filed 1987·Granted Jun 28, 1988·82 cites·17 claims
- 0287US4795722AMethod for planarization of a semiconductor device prior to metallizationTEXAS INSTRUMENTS INC·Filed 1987·Granted Jan 3, 1989·94 cites·9 claims
- 0382US4966865AMethod for planarization of a semiconductor device prior to metallizationTEXAS INSTRUMENTS INC·Filed 1988·Granted Oct 30, 1990·61 cites·19 claims
- 0479US4789885ASelf-aligned silicide in a polysilicon self-aligned bipolar transistorTEXAS INSTRUMENTS INC·Filed 1987·Granted Dec 6, 1988·38 cites·3 claims
- 0578US4862243AScalable fuse link elementTEXAS INSTRUMENTS INC·Filed 1987·Granted Aug 29, 1989·52 cites·3 claims
- 0675US5017510AMethod of making a scalable fuse link elementTEXAS INSTRUMENTS INC·Filed 1989·Granted May 21, 1991·46 cites·19 claims
- 0762US4954423APlanar metal interconnection for a VLSI deviceTEXAS INSTRUMENTS INC·Filed 1989·Granted Sep 4, 1990·27 cites·27 claims
- 0858US7412940B2Cover and method for constructing sameWESTLAND IND INC·Filed 2006·Granted Aug 19, 2008·5 cites·20 claims
- 0957US4980738ASingle polysilicon layer transistor with reduced emitter and base resistanceTEXAS INSTRUMENTS INC·Filed 1988·Granted Dec 25, 1990·17 cites·2 claims
- 1036US4753866AMethod for processing an interlevel dielectric suitable for VLSI metallization schemesTEXAS INSTRUMENTS INC·Filed 1986·Granted Jun 28, 1988·12 cites·13 claims
Join the waitlist — get patent alerts
Get an alert when Michael T. Welch files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →