Inventor · disambiguated record
Monir H. El-Diwany
Also filed as: EL-DIWANY MONIR · EL-DIWANY MONIR H
12 granted patents·258 citations·filing 1989–2010
93Inventor score
Top patents by PatentIndex Score
12 records- 0195US7687887B1Method of forming a self-aligned bipolar transistor structure using a selectively grown emitterNAT SEMICONDUCTOR CORP·Filed 2006·Granted Mar 30, 2010·39 cites·20 claims
- 0277US8148799B2Self-aligned bipolar transistor structureEL-DIWANY MONIR·Filed 2010·Granted Apr 3, 2012·6 cites·5 claims
- 0376US5953599AMethod for forming low-voltage CMOS transistors with a thin layer of gate oxide and high-voltage CMOS transistors with a thick layer of gate oxideNAT SEMICONDUCTOR CORP·Filed 1997·Granted Sep 14, 1999·41 cites·13 claims
- 0468US5846866ADrain extension regions in low voltage lateral DMOS devicesNAT SEMICONDUCTOR CORP·Filed 1997·Granted Dec 8, 1998·30 cites·4 claims
- 0562US6091111AHigh voltage mos device having an extended drain region with different dopant speciesNAT SEMICONDUCTOR CORP·Filed 1996·Granted Jul 18, 2000·25 cites·7 claims
- 0661US5082796AUse of polysilicon layer for local interconnect in a CMOS or BiCMOS technology incorporating sidewall spacersNAT SEMICONDUCTOR CORP·Filed 1990·Granted Jan 21, 1992·31 cites·38 claims
- 0754US5081518AUse of a polysilicon layer for local interconnect in a CMOS or BICMOS technology incorporating sidewall spacersNAT SEMICONDUCTOR CORP·Filed 1990·Granted Jan 14, 1992·23 cites·19 claims
- 0853US5893742ACo-implantation of arsenic and phosphorus in extended drain region for improved performance of high voltage NMOS deviceNAT SEMICONDUCTOR CORP·Filed 1996·Granted Apr 13, 1999·17 cites·15 claims
- 0953US5001081AMethod of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxideNAT SEMICONDUCTOR CORP·Filed 1989·Granted Mar 19, 1991·20 cites·36 claims
- 1046US5179031AMethod of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxideNAT SEMICONDUCTOR CORP·Filed 1990·Granted Jan 12, 1993·11 cites·9 claims
- 1140US5766990AMethod of manufacturing a high speed bipolar transistor in a CMOS processNAT SEMICONDUCTOR CORP·Filed 1997·Granted Jun 16, 1998·7 cites·2 claims
- 1235US5124817APolysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxideNAT SEMICONDUCTOR CORP·Filed 1991·Granted Jun 23, 1992·8 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →