Inventor · disambiguated record
Morgan Whately
Also filed as: WHATELY MORGAN · WHATELY MORGAN ANDREW
12 granted patents·136 citations·filing 1998–2020
90Inventor score
Files withCYPRESS SEMICONDUCTOR CORP7BARBARA BRUCE1EID SHERIF1FLIESLER MICHAEL1Infineon Technologies LLC1
Top patents by PatentIndex Score
12 records- 0184US6094095AEfficient pump for generating voltages above and/or below operating voltagesCYPRESS SEMICONDUCTOR CORP·Filed 1998·Granted Jul 25, 2000·77 cites·18 claims
- 0279US8472276B1System and method for de-latch of an integrated circuitBARBARA BRUCE·Filed 2011·Granted Jun 25, 2013·6 cites·24 claims
- 0379US7684257B1Area efficient and fast static random access memory circuit and methodCYPRESS SEMICONDUCTOR CORP·Filed 2007·Granted Mar 23, 2010·12 cites·13 claims
- 0478US8254200B2System and method to compensate for process and environmental variations in semiconductor devicesEID SHERIF·Filed 2010·Granted Aug 28, 2012·8 cites·18 claims
- 0576US11403172B2Methods for error detection and correction and corresponding systems and devices for the sameCYPRESS SEMICONDUCTOR CORP·Filed 2020·Granted Aug 2, 2022·1 cites·16 claims
- 0674US7265595B1Stochastic reset circuitCYPRESS SEMICONDUCTOR CORP·Filed 2006·Granted Sep 4, 2007·9 cites·20 claims
- 0767US8040164B2Circuits and methods for programming integrated circuit input and output impedancesCYPRESS SEMICONDUCTOR CORP·Filed 2008·Granted Oct 18, 2011·3 cites·16 claims
- 0865US8675434B1High speed time interleaved sense amplifier circuits, methods and memory devices incorporating the sameWHATELY MORGAN·Filed 2012·Granted Mar 18, 2014·4 cites·20 claims
- 0960US11971832B2Methods, devices and systems for high speed transactions with nonvolatile memory on a double data rate memory busInfineon Technologies LLC·Filed 2020·Granted Apr 30, 2024·0 cites·13 claims
- 1060US8271810B1Method and apparatus for dynamically detecting environmental conditions and adjusting drive strength in response to the detectingFLIESLER MICHAEL·Filed 2009·Granted Sep 18, 2012·5 cites·27 claims
- 1157US7196925B1Memory array with current limiting device for preventing particle induced latch-upCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Mar 27, 2007·11 cites·20 claims
- 1251US11385829B2Memory controller for non-interfering accesses to nonvolatile memory by different masters, and related systems and methodsCYPRESS SEMICONDUCTOR CORP·Filed 2019·Granted Jul 12, 2022·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →