Inventor · disambiguated record
Muhammad Faisal
Also filed as: FAISAL MUHAMMAD
17 granted patents·3 pending applications·103 citations·filing 2014–2024
91Inventor score
Files withMovellus Circuits Incorporated7MOTIVE TECH INC4MOVELLUS CIRCUITS INC4ELECTRONICS & TELECOMMUNICATIONS RES INST2UNIV MICHIGAN REGENTS2
Top patents by PatentIndex Score
20 records- 0196US11798298B2Distracted driving detection using a multi-task training processMOTIVE TECH INC·Filed 2022·Granted Oct 24, 2023·33 cites·20 claims
- 0296US11532169B1Distracted driving detection using a multi-task training processMOTIVE TECH INC·Filed 2021·Granted Dec 20, 2022·33 cites·20 claims
- 0394US9762249B1Reconfigurable phase-locked loopMOVELLUS CIRCUITS INC·Filed 2016·Granted Sep 12, 2017·11 cites·35 claims
- 0493US9705516B1Reconfigurable phase-locked loop with optional LC oscillator capabilityMOVELLUS CIRCUITS INC·Filed 2016·Granted Jul 11, 2017·9 cites·34 claims
- 0586US9641183B2Dual-loop programmable and dividerless clock generator for ultra low power applicationsUNIV MICHIGAN REGENTS·Filed 2014·Granted May 2, 2017·7 cites·17 claims
- 0683US9680480B1Fractional and reconfigurable digital phase-locked loopMOVELLUS CIRCUITS INC·Filed 2016·Granted Jun 13, 2017·6 cites·28 claims
- 0783US2024362932A1Distracted driving detection using a multi-task training processMOTIVE TECH INC·Filed 2024·Application pending·0 cites
- 0881US12062243B2Distracted driving detection using a multi-task training processMOTIVE TECH INC·Filed 2023·Granted Aug 13, 2024·0 cites·33 claims
- 0974US11720790B2Method of training image deep learning model and device thereofELECTRONICS & TELECOMMUNICATIONS RES INST·Filed 2020·Granted Aug 8, 2023·1 cites·18 claims
- 1070US10614182B2Timing analysis for electronic design automation of parallel multi-state driver circuitsMovellus Circuits Incorporated·Filed 2016·Granted Apr 7, 2020·1 cites·20 claims
- 1165US10713409B2Integrated circuit design system with automatic timing margin reductionMovellus Circuits Incorporated·Filed 2019·Granted Jul 14, 2020·0 cites·20 claims
- 1265US9515668B2Automatically placed-and-routed ADPLL with PWM-based DCO resolution enhancementUNIV MICHIGAN REGENTS·Filed 2014·Granted Dec 6, 2016·2 cites·14 claims
- 1363US11017138B2Timing analysis for parallel multi-state driver circuitsMovellus Circuits Incorporated·Filed 2020·Granted May 25, 2021·0 cites·19 claims
- 1457US10587275B2Locked loop circuit with configurable second error inputMovellus Circuits Incorporated·Filed 2018·Granted Mar 10, 2020·0 cites·20 claims
- 1556US10740526B2Integrated circuit design system with automatic timing margin reductionMovellus Circuits Incorporated·Filed 2017·Granted Aug 11, 2020·0 cites·18 claims
- 1656US10031992B2Concurrently optimized system-on-chip implementation with automatic synthesis and integrationMovellus Circuits Incorporated·Filed 2016·Granted Jul 24, 2018·0 cites·18 claims
- 1755US2019087516A1Concurrently optimized system-on-chip implementation with automatic synthesis and integrationMovellus Circuits Incorporated·Filed 2018·Application pending·0 cites
- 1854US11989927B2Apparatus and method for detecting keypoint based on deep learning using information change across receptive fieldsELECTRONICS & TELECOMMUNICATIONS RES INST·Filed 2021·Granted May 21, 2024·0 cites·17 claims
- 1946US2022215325A1Automated identification of changed-induced incidentsKYNDRYL INC·Filed 2021·Application pending·0 cites
- 2045US10158365B2Digital, reconfigurable frequency and delay generator with phase measurementMOVELLUS CIRCUITS INC·Filed 2016·Granted Dec 18, 2018·0 cites·28 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →