Inventor · disambiguated record
Nak-Won Heo
Also filed as: HEO NAK-WON
15 granted patents·4 pending applications·231 citations·filing 2002–2016
93Inventor score
Top patents by PatentIndex Score
19 records- 0194US6621315B2Delay locked loop circuit and method having adjustable locking resolutionSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Sep 16, 2003·89 cites·28 claims
- 0291US6717448B2Data output method and data output circuit for applying reduced precharge levelSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Apr 6, 2004·45 cites·7 claims
- 0381US6940321B2Circuit for generating a data strobe signal used in a double data rate synchronous semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Sep 6, 2005·28 cites·14 claims
- 0480US7447084B2Semiconductor memory device and method of supplying wordline voltage thereofSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Nov 4, 2008·12 cites·12 claims
- 0575US9336906B2Semiconductor memory devices including redundancy memory cellsLEE YUN-YOUNG·Filed 2014·Granted May 10, 2016·4 cites·10 claims
- 0670US7376021B2Data output circuit and method in DDR synchronous semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted May 20, 2008·15 cites·13 claims
- 0768US8199588B2Semiconductor memory device with a data output circuit configured to output stored data during a first type of read operation and configured to output at least one data pattern during a second type of read operation and methods thereofHEO NAK-WON·Filed 2009·Granted Jun 12, 2012·5 cites·17 claims
- 0866US7068084B2Delay locked loop capable of compensating for delay of internal clock signal by variation of driving strength of output driver in semiconductor memory deviceSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Jun 27, 2006·15 cites·7 claims
- 0964US7551495B2Semiconductor memory device with a data output circuit configured to output stored data during a first type of read operation and configured to output at least one data pattern during a second type of read operation and methods thereofSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Jun 23, 2009·4 cites·16 claims
- 1062US6839786B2Information processing system with memory modules of a serial bus architectureSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Jan 4, 2005·12 cites·16 claims
- 1148US9858981B2Semiconductor memory devices including redundancy memory cellsSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jan 2, 2018·0 cites·17 claims
- 1248US7518898B2Semiconductor memory device with strengthened power and method of strengthening power of the sameSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Apr 14, 2009·2 cites·14 claims
- 1347US9524770B2Semiconductor memory devices including redundancy memory cellsSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Dec 20, 2016·0 cites·20 claims
- 1446US2014219000A1Otp cell array including protected area, semiconductor memory device including the same, and method of programming the sameSAMSUNG ELECTRONICS CO LTD·Filed 2013·Application pending·0 cites
- 1543US8625364B2Semiconductor memory devices and systems including data output circuits to output stored data during first output mode and output programmed data pattern during second output modeHEO NAK-WON·Filed 2012·Granted Jan 7, 2014·0 cites·16 claims
- 1641US7558127B2Data output circuit and method in DDR synchronous semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2008·Granted Jul 7, 2009·0 cites·7 claims
- 1737US2014241085A1Semiconductor memory device for performing disable operation using anti-fuse and method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2013·Application pending·0 cites
- 1836US2008215939A1Semiconductor memory device with fail-bit storage unit and method for parallel bit testingSAMSUNG ELECTRONICS CO LTD·Filed 2008·Application pending·0 cites
- 1932US2008049526A1Semiconductor memory device with data and local redundancy memory cell arrays, and redundancy method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →