Inventor · disambiguated record
Nicholas J. Foskett
Also filed as: FOSKETT NICHOLAS J
19 granted patents·1,347 citations·filing 1995–2006
97Inventor score
Top patents by PatentIndex Score
19 records- 0196US6992667B2Single semiconductor graphics platform system and method with skinning, swizzling and masking capabilitiesNVIDIA CORP·Filed 2003·Granted Jan 31, 2006·75 cites·29 claims
- 0296US6577309B2System and method for a graphics processing framework embodied utilizing a single semiconductor platformNVIDIA CORP·Filed 2001·Granted Jun 10, 2003·72 cites·44 claims
- 0396US6198488B1Transform, lighting and rasterization system embodied on a single semiconductor platformNVIDIA CORP·Filed 1999·Granted Mar 6, 2001·133 cites·26 claims
- 0495US7064763B2Single semiconductor graphics platformNVIDIA CORP·Filed 2002·Granted Jun 20, 2006·64 cites·52 claims
- 0593US6462737B2Clipping system and method for a graphics processing framework embodied on a single semiconductor platformNVIDIA CORP·Filed 2001·Granted Oct 8, 2002·48 cites·18 claims
- 0693US5991515AMethod and apparatus for compressing and decompressing data prior to displayADOBE SYSTEMS INC·Filed 1997·Granted Nov 23, 1999·299 cites·14 claims
- 0792US6650331B2System, method and computer program product for performing a scissor operation in a graphics processing framework embodied on a single semiconductor platformNVIDIA CORP·Filed 2001·Granted Nov 18, 2003·43 cites·49 claims
- 0892US5638498AMethod and apparatus for reducing storage requirements for display dataADOBE SYSTEMS INC·Filed 1995·Granted Jun 10, 1997·359 cites·60 claims
- 0986US6647456B1High bandwidth-low latency memory controllerNVIDIA CORP·Filed 2001·Granted Nov 11, 2003·42 cites·56 claims
- 1085US6342888B1Graphics processing unit with an integrated fog and blending operationNVIDIA CORP·Filed 2000·Granted Jan 29, 2002·22 cites·24 claims
- 1178US6504542B1Method, apparatus and article of manufacture for area rasterization using sense pointsNVIDIA CORP·Filed 1999·Granted Jan 7, 2003·64 cites·3 claims
- 1276US7117238B1Method and system for performing pipelined reciprocal and reciprocal square root operationsNVIDIA CORP·Filed 2002·Granted Oct 3, 2006·23 cites·35 claims
- 1372US7034829B2Masking system and method for a graphics processing framework embodied on a single semiconductor platformNVIDIA CORP·Filed 2001·Granted Apr 25, 2006·9 cites·55 claims
- 1471US7050055B2Single semiconductor graphics platform with blending and fog capabilitiesNVIDIA CORP·Filed 2002·Granted May 23, 2006·13 cites·48 claims
- 1570US6765575B1Clip-less rasterization using line equation-based traversalNVIDIA CORP·Filed 1999·Granted Jul 20, 2004·45 cites·12 claims
- 1668US7809782B1Method and system for selecting a set of parametersNVIDIA CORP·Filed 2006·Granted Oct 5, 2010·4 cites·15 claims
- 1763US6957298B1System and method for a high bandwidth-low latency memory controllerNVIDIA CORP·Filed 2003·Granted Oct 18, 2005·7 cites·26 claims
- 1861US7002577B2Clipping system and method for a single graphics semiconductor platformNVIDIA CORP·Filed 2002·Granted Feb 21, 2006·7 cites·31 claims
- 1951US6650325B1Method, apparatus and article of manufacture for boustrophedonic rasterizationNVIDIA CORP·Filed 1999·Granted Nov 18, 2003·18 cites·35 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →