Inventor · disambiguated record
Nicholas R. Orzol
Also filed as: ORZOL NICHOLAS · ORZOL NICHOLAS R
18 granted patents·2 pending applications·11 citations·filing 2016–2022
88Inventor score
Technology areasG06F
Files withIBM20
Top patents by PatentIndex Score
20 records- 0187US11392386B2Program counter (PC)-relative load and store addressing for fused instructionsIBM·Filed 2020·Granted Jul 19, 2022·2 cites·20 claims
- 0279US10037207B2Power management of branch predictors in a computer processorIBM·Filed 2016·Granted Jul 31, 2018·2 cites·7 claims
- 0378US9996351B2Power management of branch predictors in a computer processorIBM·Filed 2016·Granted Jun 12, 2018·2 cites·10 claims
- 0477US10037259B2Adaptive debug tracing for microprocessorsIBM·Filed 2016·Granted Jul 31, 2018·3 cites·20 claims
- 0571US10740104B2Tagging target branch predictors with context with index modification and late stop fetch on tag mismatchIBM·Filed 2018·Granted Aug 11, 2020·1 cites·17 claims
- 0669US10936318B2Tagged indirect branch predictor (TIP)IBM·Filed 2018·Granted Mar 2, 2021·1 cites·18 claims
- 0759US10552159B2Power management of branch predictors in a computer processorIBM·Filed 2018·Granted Feb 4, 2020·0 cites·17 claims
- 0858US11886883B2Dependency skipping in a load-compare-jump sequence of instructions by incorporating compare functionality into the jump instruction and auto-finishing the compare instructionIBM·Filed 2021·Granted Jan 30, 2024·0 cites·20 claims
- 0957US10528347B2Executing system call vectored instructions in a multi-slice processorIBM·Filed 2018·Granted Jan 7, 2020·0 cites·11 claims
- 1054US10048963B2Executing system call vectored instructions in a multi-slice processorIBM·Filed 2016·Granted Aug 14, 2018·0 cites·17 claims
- 1153US11663013B2Dependency skipping executionIBM·Filed 2021·Granted May 30, 2023·0 cites·17 claims
- 1252US2024202127A1Sideband instruction address translationIBM·Filed 2022·Application pending·0 cites
- 1351US11593108B2Sharing instruction cache footprint between multiple threadsIBM·Filed 2021·Granted Feb 28, 2023·0 cites·25 claims
- 1450US11593109B2Sharing instruction cache lines between multiple threadsIBM·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 1550US11416257B2Hybrid and aggregrate branch prediction system with a tagged branch orientation predictor for prediction override or pass-throughIBM·Filed 2019·Granted Aug 16, 2022·0 cites·20 claims
- 1650US11106466B2Decoupling of conditional branchesIBM·Filed 2018·Granted Aug 31, 2021·0 cites·20 claims
- 1747US2023063079A1Speculative resolution of last branch-on-count at fetchIBM·Filed 2021·Application pending·0 cites
- 1845US10678551B2Operation of a multi-slice processor implementing tagged geometric history length (TAGE) branch predictionIBM·Filed 2016·Granted Jun 9, 2020·0 cites·20 claims
- 1944US10275256B2Branch prediction in a computer processorIBM·Filed 2016·Granted Apr 30, 2019·0 cites·20 claims
- 2042US10127121B2Operation of a multi-slice processor implementing adaptive failure state captureIBM·Filed 2016·Granted Nov 13, 2018·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →