Inventor · disambiguated record
Nitz Saputra
Also filed as: SAPUTRA NITZ
16 granted patents·2 pending applications·17 citations·filing 2016–2023
87Inventor score
Files withQUALCOMM INC18
Top patents by PatentIndex Score
18 records- 0189US10454487B1Segmented resistor architecture for digital-to-analog convertersQUALCOMM INC·Filed 2018·Granted Oct 22, 2019·9 cites·30 claims
- 0288US11705921B2Adaptive switch biasing scheme for digital-to-analog converter (DAC) performance enhancementQUALCOMM INC·Filed 2021·Granted Jul 18, 2023·2 cites·30 claims
- 0386US12381571B2Reconfigurable transmit digital-to-analog converter (DAC) circuitQUALCOMM INC·Filed 2022·Granted Aug 5, 2025·1 cites·29 claims
- 0483US12113499B2Wideband current-mode low-pass filter circuitsQUALCOMM INC·Filed 2022·Granted Oct 8, 2024·1 cites·24 claims
- 0580US11990911B2Clock driver for time-interleaved digital-to-analog converterQUALCOMM INC·Filed 2022·Granted May 21, 2024·1 cites·32 claims
- 0672US12418283B2Programmable self-biasing inverter for correcting duty cycle distortionQUALCOMM INC·Filed 2023·Granted Sep 16, 2025·0 cites·19 claims
- 0769US10797720B2Apparatus and method for measuring current source mismatches in current-steering DAC by re-using R2R networkQUALCOMM INC·Filed 2019·Granted Oct 6, 2020·2 cites·35 claims
- 0865US10454509B2Communication circuit including a transmitterQUALCOMM INC·Filed 2018·Granted Oct 22, 2019·1 cites·21 claims
- 0961US12081229B2Common-mode current removal schemes for digital-to-analog convertersQUALCOMM INC·Filed 2022·Granted Sep 3, 2024·0 cites·26 claims
- 1059US12040817B2Resistor network with adaptive resistance for digital-to-analog converter (DAC)QUALCOMM INC·Filed 2022·Granted Jul 16, 2024·0 cites·20 claims
- 1159US11621716B1Return-to-zero (RZ) digital-to-analog converter (DAC) for image cancellationQUALCOMM INC·Filed 2021·Granted Apr 4, 2023·0 cites·30 claims
- 1258US12278632B1Low power auto-scalable differential predriverQUALCOMM INC·Filed 2023·Granted Apr 15, 2025·0 cites·30 claims
- 1356US12362761B2Digital-to-analog converter (DAC) with dynamic stacked cascode switchesQUALCOMM INC·Filed 2023·Granted Jul 15, 2025·0 cites·20 claims
- 1452US12436558B2Hybrid clocking scheme for SERDES physical layer circuitsQUALCOMM INC·Filed 2023·Granted Oct 7, 2025·0 cites·9 claims
- 1548US10305361B2Low voltage input calibrating digital to analog converterQUALCOMM INC·Filed 2017·Granted May 28, 2019·0 cites·18 claims
- 1646US10686476B1Digital RF-DACQUALCOMM INC·Filed 2019·Granted Jun 16, 2020·0 cites·20 claims
- 1737US2022352899A1Data-dependent clock-gating switch driver for a digital-to-analog converter (dac)QUALCOMM INC·Filed 2021·Application pending·0 cites
- 1834US2017257066A1Systems and methods for compensating for variation in an amplitude-regulated oscillatorQUALCOMM INC·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →