Inventor · disambiguated record
Noriko Ishibashi
Also filed as: ISHIBASHI NORIKO
4 granted patents·3 pending applications·121 citations·filing 1999–2011
78Inventor score
Technology areasG06F
Top patents by PatentIndex Score
7 records- 0178US6336205B1Method for designing semiconductor integrated circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1999·Granted Jan 1, 2002·90 cites·14 claims
- 0270US6988254B2Method for designing semiconductor integrated circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2003·Granted Jan 17, 2006·17 cites·3 claims
- 0366US6938233B2Method and apparatus for designing semiconductor integrated circuit device based on voltage drop distributionMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2003·Granted Aug 30, 2005·12 cites·13 claims
- 0460US7925998B2Delay calculating method in semiconductor integrated circuitPANASONIC CORP·Filed 2005·Granted Apr 12, 2011·2 cites·8 claims
- 0544US2011185327A1Delay calculating method in semiconductor integrated circuitPANASONIC CORP·Filed 2011·Application pending·0 cites
- 0643US2010313176A1Delay library, delay library creation method, and delay calculation methodTAKAHASHI MASAO·Filed 2009·Application pending·0 cites
- 0739US2005232066A1Method for characterizing cells with consideration for bumped waveform and delay time calculation method for semiconductor integrated circuits using the sameMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →