Inventor · disambiguated record
Norbert Rehm
Also filed as: REHM NORBERT · REHM NORBERT JOSEPH III
18 granted patents·2 pending applications·92 citations·filing 2002–2006
93Inventor score
Top patents by PatentIndex Score
20 records- 0178US7299388B2Method and apparatus for selectively accessing and configuring individual chips of a semi-conductor waferINFINEON TECHNOLOGIES AG·Filed 2005·Granted Nov 20, 2007·7 cites·14 claims
- 0264US6639824B1Memory architectureINFINEON TECHNOLOGIES AG·Filed 2002·Granted Oct 28, 2003·13 cites·28 claims
- 0361US7457177B2Random access memory including circuit to compress comparison resultsINFINEON TECHNOLOGIES AG·Filed 2005·Granted Nov 25, 2008·5 cites·21 claims
- 0461US6731529B2Variable capacitances for memory cells within a cell groupINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 4, 2004·7 cites·15 claims
- 0559US7170804B2Test mode for detecting a floating word lineINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jan 30, 2007·4 cites·22 claims
- 0659US6999887B2Memory cell signal window testing apparatusINFINEON TECHNOLOGIES AG·Filed 2003·Granted Feb 14, 2006·10 cites·6 claims
- 0757US7313033B2Random access memory including first and second voltage sourcesINFINEON TECHNOLOGIES AG·Filed 2005·Granted Dec 25, 2007·4 cites·29 claims
- 0856US7171156B2Method and apparatus for transmitting audio and non-audio information with error correctionTHOMSON LICENSING·Filed 2002·Granted Jan 30, 2007·5 cites·18 claims
- 0954US7539911B2Test mode for programming rate and precharge time for DRAM activate-precharge cycleINFINEON TECHNOLOGIES AG·Filed 2005·Granted May 26, 2009·3 cites·43 claims
- 1053US6920059B2Reducing effects of noise coupling in integrated circuits with memory arraysTOSHIBA KK·Filed 2002·Granted Jul 19, 2005·7 cites·43 claims
- 1151US7085191B2Simulating a floating wordline condition in a memory device, and related techniquesINFINEON TECHNOLOGIES AG·Filed 2004·Granted Aug 1, 2006·6 cites·34 claims
- 1247US7408833B2Simulating a floating wordline condition in a memory device, and related techniquesINFINEON TECHNOLOGIES AG·Filed 2006·Granted Aug 5, 2008·1 cites·12 claims
- 1347US7362632B2Test parallelism increase by tester controllable switching of chip select groupsINFINEON TECHNOLOGIES AG·Filed 2006·Granted Apr 22, 2008·2 cites·20 claims
- 1447US6687171B2Flexible redundancy for memoriesINFINEON TECHNOLOGIES AG·Filed 2002·Granted Feb 3, 2004·5 cites·11 claims
- 1546US6707699B1Historical information storage for integrated circuitsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Mar 16, 2004·4 cites·19 claims
- 1645US6856560B2Redundancy in series grouped memory architectureINFINEON TECHNOLOGIES AG·Filed 2002·Granted Feb 15, 2005·4 cites·25 claims
- 1742US6906969B2Hybrid fuses for redundancyTOSHIBA KK·Filed 2002·Granted Jun 14, 2005·3 cites·43 claims
- 1840US6903959B2Sensing of memory integrated circuitsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jun 7, 2005·2 cites·22 claims
- 1933US2007165479A1Local wordline driver scheme to avoid fails due to floating wordline in a segmented wordline driver schemeREHM NORBERT·Filed 2006·Application pending·0 cites
- 2032US2005063212A1Reference circuit implemented to reduce the degradation of reference capacitors providing reference voltages for 1T1C FeRAM devicesFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →