Inventor · disambiguated record
Oleg Golonzka
Also filed as: GOLONZKA OLEG
82 granted patents·25 pending applications·239 citations·filing 2004–2025
99Inventor score
Top patents by PatentIndex Score
107 records- 0197US11721630B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2022·Granted Aug 8, 2023·2 cites·20 claims
- 0297US9716037B2Gate aligned contact and method to fabricate sameGOLONZKA OLEG·Filed 2011·Granted Jul 25, 2017·65 cites·15 claims
- 0395US12272737B2Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contactINTEL CORP·Filed 2023·Granted Apr 8, 2025·2 cites·21 claims
- 0494US11018222B1Metallization in integrated circuit structuresINTEL CORP·Filed 2019·Granted May 25, 2021·16 cites·20 claims
- 0594US10297549B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2018·Granted May 21, 2019·5 cites·20 claims
- 0693US10409152B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2017·Granted Sep 10, 2019·4 cites·20 claims
- 0793US9922930B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2017·Granted Mar 20, 2018·5 cites·20 claims
- 0893US9559060B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2016·Granted Jan 31, 2017·5 cites·20 claims
- 0993US9437546B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2016·Granted Sep 6, 2016·5 cites·14 claims
- 1092US10340445B2PSTTM device with bottom electrode interface materialINTEL CORP·Filed 2015·Granted Jul 2, 2019·5 cites·16 claims
- 1191US2025029926A1Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2024·Application pending·0 cites
- 1290US11908856B2Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contactINTEL CORP·Filed 2019·Granted Feb 20, 2024·5 cites·22 claims
- 1390US11799009B2Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contactINTEL CORP·Filed 2019·Granted Oct 24, 2023·4 cites·28 claims
- 1490US9876016B2Wrap-around trench contact structure and methods of fabricationSTEIGERWALD JOSEPH·Filed 2011·Granted Jan 23, 2018·13 cites·16 claims
- 1589US9252267B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2014·Granted Feb 2, 2016·5 cites·14 claims
- 1689US2024282633A1Gate aligned contact and method to fabricate sameINTEL CORP·Filed 2024·Application pending·0 cites
- 1788US12364002B2Integrated circuit structures having metal gates with tapered plugsINTEL CORP·Filed 2021·Granted Jul 15, 2025·2 cites·20 claims
- 1888US11824116B2Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contactINTEL CORP·Filed 2019·Granted Nov 21, 2023·4 cites·20 claims
- 1988US9558947B2Pattern decomposition lithography techniquesWALLACE CHARLES H·Filed 2011·Granted Jan 31, 2017·6 cites·16 claims
- 2088US8803245B2Method of forming stacked trench contacts and structures formed therebySELL BERNHARD·Filed 2008·Granted Aug 12, 2014·9 cites·17 claims
- 2187US12033894B2Gate aligned contact and method to fabricate sameINTEL CORP·Filed 2023·Granted Jul 9, 2024·0 cites·20 claims
- 2287US10490519B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2017·Granted Nov 26, 2019·2 cites·20 claims
- 2387US7768074B2Dual salicide integration for salicide through trench contacts and structures formed therebyINTEL CORP·Filed 2008·Granted Aug 3, 2010·13 cites·15 claims
- 2486US8193049B2Methods of channel stress engineering and structures formed therebyGOLONZKA OLEG·Filed 2008·Granted Jun 5, 2012·14 cites·13 claims
- 2585US12142566B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2023·Granted Nov 12, 2024·0 cites·20 claims
- 2685US11107786B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2019·Granted Aug 31, 2021·2 cites·20 claims
- 2785US11063088B2Magnetic memory devices and methods of fabricationINTEL CORP·Filed 2019·Granted Jul 13, 2021·3 cites·22 claims
- 2885US10326075B2PSTTM device with multi-layered filter stackINTEL CORP·Filed 2015·Granted Jun 18, 2019·2 cites·20 claims
- 2984US11756829B2Gate aligned contact and method to fabricate sameINTEL CORP·Filed 2022·Granted Sep 12, 2023·0 cites·20 claims
- 3082US12426360B2Wrap-around trench contact structure and methods of fabricationINTEL CORP·Filed 2023·Granted Sep 23, 2025·0 cites·20 claims
- 3181US10411068B2Electrical contacts for magnetoresistive random access memory devicesINTEL CORP·Filed 2015·Granted Sep 10, 2019·3 cites·25 claims
- 3280US11342499B2RRAM devices with reduced forming voltageINTEL CORP·Filed 2017·Granted May 24, 2022·4 cites·22 claims
- 3380US10811595B2Techniques for forming logic including integrated spin-transfer torque magnetoresistive random-access memoryINTEL CORP·Filed 2016·Granted Oct 20, 2020·2 cites·21 claims
- 3479US12295170B2Fabrication of gate-all-around integrated circuit structures having additive metal gates and gate dielectrics with a dipole layerINTEL CORP·Filed 2020·Granted May 6, 2025·1 cites·9 claims
- 3577US12288789B2Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contactINTEL CORP·Filed 2024·Granted Apr 29, 2025·0 cites·20 claims
- 3677US11495496B2Gate aligned contact and method to fabricate sameINTEL CORP·Filed 2021·Granted Nov 8, 2022·0 cites·20 claims
- 3777US2025107181A1Gate-all-around integrated circuit structures having removed substrateINTEL CORP·Filed 2024·Application pending·0 cites
- 3877US2024429238A1Fabrication of gate-all-around integrated circuit structures having additive metal gatesINTEL CORP·Filed 2024·Application pending·0 cites
- 3976US12402349B2Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contactINTEL CORP·Filed 2023·Granted Aug 26, 2025·0 cites·20 claims
- 4076US12278204B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2021·Granted Apr 15, 2025·0 cites·15 claims
- 4176US2025227992A1Fabrication of gate-all-around integrated circuit structures having additive metal gatesINTEL CORP·Filed 2025·Application pending·0 cites
- 4275US12369392B2Fabrication of gate-all-around integrated circuit structures having pre-spacer deposition cut gatesINTEL CORP·Filed 2024·Granted Jul 22, 2025·0 cites·20 claims
- 4375US11335639B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2020·Granted May 17, 2022·0 cites·20 claims
- 4474US10910265B2Gate aligned contact and method to fabricate sameINTEL CORP·Filed 2020·Granted Feb 2, 2021·0 cites·20 claims
- 4574US10559744B2Texture breaking layer to decouple bottom electrode from PMTJ deviceINTEL CORP·Filed 2016·Granted Feb 11, 2020·2 cites·17 claims
- 4673US10943950B2Magnetic memory devices with enhanced tunnel magnetoresistance ratio (TMR) and methods of fabricationINTEL CORP·Filed 2019·Granted Mar 9, 2021·1 cites·20 claims
- 4772US10861851B2Wrap-around trench contact structure and methods of fabricationINTEL CORP·Filed 2017·Granted Dec 8, 2020·1 cites·18 claims
- 4872US7776729B2Transistor, method of manufacturing same, etchant for use during manufacture of same, and system containing sameINTEL CORP·Filed 2006·Granted Aug 17, 2010·5 cites·5 claims
- 4971US11776959B2Wrap-around trench contact structure and methods of fabricationINTEL CORP·Filed 2020·Granted Oct 3, 2023·0 cites·20 claims
- 5070US9318694B2Methods of forming a magnetic random access memory etch spacer and structures formed therebyINTEL CORP·Filed 2013·Granted Apr 19, 2016·4 cites·24 claims
Showing the top 50 of 107 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →