Inventor · disambiguated record
Paul Eric Dahlen
Also filed as: DAHLEN PAUL E · DAHLEN PAUL ERIC
58 granted patents·15 pending applications·341 citations·filing 1997–2019
98Inventor score
Top patents by PatentIndex Score
73 records- 0192US7342816B2Daisy chainable memory chipIBM·Filed 2006·Granted Mar 11, 2008·27 cites·20 claims
- 0289US7952478B2Capacitance-based microchip exploitation detectionIBM·Filed 2008·Granted May 31, 2011·20 cites·20 claims
- 0388US7884625B2Capacitance structures for defeating microchip tamperingIBM·Filed 2008·Granted Feb 8, 2011·16 cites·20 claims
- 0486US7989918B2Implementing tamper evident and resistant detection through modulation of capacitanceIBM·Filed 2009·Granted Aug 2, 2011·13 cites·20 claims
- 0584US7723816B2Implementing decoupling capacitors with hot-spot thermal reduction on integrated circuit chipsIBM·Filed 2008·Granted May 25, 2010·10 cites·12 claims
- 0684US7202685B1Embedded probe-enabling socket with integral probe structuresIBM·Filed 2005·Granted Apr 10, 2007·12 cites·9 claims
- 0783US7838336B2Method and structure for dispensing chip underfill through an opening in the chipIBM·Filed 2007·Granted Nov 23, 2010·10 cites·6 claims
- 0882US7675164B2Method and structure for connecting, stacking, and cooling chips on a flexible carrierIBM·Filed 2007·Granted Mar 9, 2010·10 cites·15 claims
- 0982US7345900B2Daisy chained memory systemIBM·Filed 2006·Granted Mar 18, 2008·13 cites·22 claims
- 1081US7074050B1Socket assembly with incorporated memory structureIBM·Filed 2005·Granted Jul 11, 2006·19 cites·14 claims
- 1180US7345901B2Computer system having daisy chained self timed memory chipsIBM·Filed 2006·Granted Mar 18, 2008·12 cites·20 claims
- 1279US7701244B2False connection for defeating microchip exploitationIBM·Filed 2008·Granted Apr 20, 2010·8 cites·20 claims
- 1377US7954081B2Implementing enhanced wiring capability for electronic laminate packagesIBM·Filed 2008·Granted May 31, 2011·6 cites·10 claims
- 1476US7088200B2Method and structure to control common mode impedance in fan-out regionsIBM·Filed 2004·Granted Aug 8, 2006·11 cites·13 claims
- 1575US8079134B2Method of enhancing on-chip inductance structure utilizing silicon through via technologyMAKI ANDREW BENSON·Filed 2008·Granted Dec 20, 2011·9 cites·1 claims
- 1674US9003559B2Continuity check monitoring for microchip exploitation detectionBARTLEY GERALD K·Filed 2008·Granted Apr 7, 2015·6 cites·18 claims
- 1774US7725762B2Implementing redundant memory access using multiple controllers on the same bank of memoryIBM·Filed 2007·Granted May 25, 2010·6 cites·17 claims
- 1874US7667487B2Techniques for providing switchable decoupling capacitors for an integrated circuitIBM·Filed 2008·Granted Feb 23, 2010·6 cites·19 claims
- 1974US7627711B2Memory controller for daisy chained memory chipsIBM·Filed 2006·Granted Dec 1, 2009·6 cites·5 claims
- 2073US8172140B2Doped implant monitoring for microchip tamper detectionBARTLEY GERALD K·Filed 2008·Granted May 8, 2012·5 cites·20 claims
- 2173US7480201B2Daisy chainable memory chipIBM·Filed 2007·Granted Jan 20, 2009·8 cites·1 claims
- 2271US7673093B2Computer system having daisy chained memory chipsIBM·Filed 2006·Granted Mar 2, 2010·5 cites·1 claims
- 2371US7546410B2Self timed memory chip having an apportionable data busIBM·Filed 2006·Granted Jun 9, 2009·5 cites·3 claims
- 2470US7553696B2Method for implementing component placement suspended within grid array packages for enhanced electrical performanceIBM·Filed 2006·Granted Jun 30, 2009·4 cites·7 claims
- 2570US7402912B2Method and power control structure for managing plurality of voltage islandsIBM·Filed 2005·Granted Jul 22, 2008·3 cites·3 claims
- 2669US6757175B1Method and embedded bus bar structure for implementing power distributionIBM·Filed 2003·Granted Jun 29, 2004·13 cites·12 claims
- 2768US8174103B2Enhanced architectural interconnect options enabled with flipped die on a multi-chip packageBARTLEY GERALD KEITH·Filed 2008·Granted May 8, 2012·4 cites·1 claims
- 2868US7620763B2Memory chip having an apportionable data busIBM·Filed 2006·Granted Nov 17, 2009·4 cites·13 claims
- 2968US7036710B1Method and structures for implementing impedance-controlled coupled noise suppressor for differential interface solder column arrayIBM·Filed 2004·Granted May 2, 2006·12 cites·9 claims
- 3066US8332659B2Signal quality monitoring to defeat microchip exploitationBARTLEY GERALD K·Filed 2008·Granted Dec 11, 2012·3 cites·19 claims
- 3164US7472360B2Method for implementing enhanced wiring capability for electronic laminate packagesIBM·Filed 2006·Granted Dec 30, 2008·2 cites·4 claims
- 3264US7088199B2Method and stiffener-embedded waveguide structure for implementing enhanced data transferIBM·Filed 2004·Granted Aug 8, 2006·6 cites·12 claims
- 3363US8214657B2Resistance sensing for defeating microchip exploitationBARTLEY GERALD K·Filed 2008·Granted Jul 3, 2012·2 cites·20 claims
- 3463US7050871B2Method and apparatus for implementing silicon wafer chip carrier passive devicesIBM·Filed 2004·Granted May 23, 2006·8 cites·17 claims
- 3562US7852103B2Implementing at-speed Wafer Final Test (WFT) with complete chip coverageIBM·Filed 2009·Granted Dec 14, 2010·1 cites·13 claims
- 3662US7545664B2Memory system having self timed daisy chained memory chipsIBM·Filed 2006·Granted Jun 9, 2009·2 cites·4 claims
- 3758US7844769B2Computer system having an apportionable data bus and daisy chained memory chipsIBM·Filed 2006·Granted Nov 30, 2010·1 cites·1 claims
- 3858US7660942B2Daisy chainable self timed memory chipIBM·Filed 2006·Granted Feb 9, 2010·1 cites·19 claims
- 3958US7617350B2Carrier having daisy chained memory chipsIBM·Filed 2006·Granted Nov 10, 2009·1 cites·1 claims
- 4058US7490186B2Memory system having an apportionable data bus and daisy chained memory chipsIBM·Filed 2006·Granted Feb 10, 2009·1 cites·11 claims
- 4155US7010768B2Transmission line bounding modelsIBM·Filed 2003·Granted Mar 7, 2006·4 cites·16 claims
- 4255US6224395B1Flex cables with increased three-dimensional conformity and design flexibilityIBM·Filed 1997·Granted May 1, 2001·17 cites·3 claims
- 4355US2008185734A1Power control structure for managing a plurality of voltage islandsIBM·Filed 2008·Application pending·0 cites
- 4454US11439015B2Surface mount device placement to control a signal path in a printed circuit boardIBM·Filed 2019·Granted Sep 6, 2022·0 cites·20 claims
- 4554US7945883B2Apparatus, and computer program for implementing vertically coupled noise control through a mesh plane in an electronic package designIBM·Filed 2008·Granted May 17, 2011·0 cites·5 claims
- 4649US7810065B2System and method for implementing optimized creation of openings for de-gassing in an electronic packageIBM·Filed 2007·Granted Oct 5, 2010·0 cites·12 claims
- 4749US7472368B2Method for implementing vertically coupled noise control through a mesh plane in an electronic package designIBM·Filed 2005·Granted Dec 30, 2008·0 cites·8 claims
- 4849US7036709B2Method and structure for implementing column attach coupled noise suppressorIBM·Filed 2003·Granted May 2, 2006·2 cites·16 claims
- 4949US2009183364A1Method of connecting a series of integrated devices utilizing flexible circuits in a semi-stacking configurationIBM·Filed 2008·Application pending·0 cites
- 5048US7650455B2Spider web interconnect topology utilizing multiple port connectionIBM·Filed 2007·Granted Jan 19, 2010·0 cites·18 claims
Showing the top 50 of 73 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →